1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * OMAP2+ Clock Management prototypes 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. 6*4882a593Smuzhiyun * Copyright (C) 2007-2009 Nokia Corporation 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Written by Paul Walmsley 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun #ifndef __ARCH_ASM_MACH_OMAP2_CM_H 11*4882a593Smuzhiyun #define __ARCH_ASM_MACH_OMAP2_CM_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* 14*4882a593Smuzhiyun * MAX_MODULE_READY_TIME: max duration in microseconds to wait for the 15*4882a593Smuzhiyun * PRCM to request that a module exit the inactive state in the case of 16*4882a593Smuzhiyun * OMAP2 & 3. 17*4882a593Smuzhiyun * In the case of OMAP4 this is the max duration in microseconds for the 18*4882a593Smuzhiyun * module to reach the functionnal state from an inactive state. 19*4882a593Smuzhiyun */ 20*4882a593Smuzhiyun #define MAX_MODULE_READY_TIME 2000 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun # ifndef __ASSEMBLER__ 23*4882a593Smuzhiyun #include <linux/clk/ti.h> 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #include "prcm-common.h" 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun extern struct omap_domain_base cm_base; 28*4882a593Smuzhiyun extern struct omap_domain_base cm2_base; 29*4882a593Smuzhiyun extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2); 30*4882a593Smuzhiyun # endif 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for 34*4882a593Smuzhiyun * the PRCM to request that a module enter the inactive state in the 35*4882a593Smuzhiyun * case of OMAP2 & 3. In the case of OMAP4 this is the max duration 36*4882a593Smuzhiyun * in microseconds for the module to reach the inactive state from 37*4882a593Smuzhiyun * a functional state. 38*4882a593Smuzhiyun * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during 39*4882a593Smuzhiyun * kernel init. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun #define MAX_MODULE_DISABLE_TIME 5000 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun # ifndef __ASSEMBLER__ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /** 46*4882a593Smuzhiyun * struct cm_ll_data - fn ptrs to per-SoC CM function implementations 47*4882a593Smuzhiyun * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl 48*4882a593Smuzhiyun * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl 49*4882a593Smuzhiyun * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl 50*4882a593Smuzhiyun * @module_enable: ptr to the SoC CM-specific module_enable impl 51*4882a593Smuzhiyun * @module_disable: ptr to the SoC CM-specific module_disable impl 52*4882a593Smuzhiyun * @xlate_clkctrl: ptr to the SoC CM-specific clkctrl xlate addr impl 53*4882a593Smuzhiyun */ 54*4882a593Smuzhiyun struct cm_ll_data { 55*4882a593Smuzhiyun int (*split_idlest_reg)(struct clk_omap_reg *idlest_reg, s16 *prcm_inst, 56*4882a593Smuzhiyun u8 *idlest_reg_id); 57*4882a593Smuzhiyun int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg, 58*4882a593Smuzhiyun u8 idlest_shift); 59*4882a593Smuzhiyun int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg, 60*4882a593Smuzhiyun u8 idlest_shift); 61*4882a593Smuzhiyun void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs); 62*4882a593Smuzhiyun void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs); 63*4882a593Smuzhiyun u32 (*xlate_clkctrl)(u8 part, u16 inst, u16 clkctrl_offs); 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun extern int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst, 67*4882a593Smuzhiyun u8 *idlest_reg_id); 68*4882a593Smuzhiyun int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg, 69*4882a593Smuzhiyun u8 idlest_shift); 70*4882a593Smuzhiyun int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, 71*4882a593Smuzhiyun u8 idlest_shift); 72*4882a593Smuzhiyun int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs); 73*4882a593Smuzhiyun int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs); 74*4882a593Smuzhiyun u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs); 75*4882a593Smuzhiyun extern int cm_register(const struct cm_ll_data *cld); 76*4882a593Smuzhiyun extern int cm_unregister(const struct cm_ll_data *cld); 77*4882a593Smuzhiyun int omap_cm_init(void); 78*4882a593Smuzhiyun int omap2_cm_base_init(void); 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun # endif 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #endif 83