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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/reset/
H A Drenesas,rst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/reset/renesas,rst.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Renesas R-Car and RZ/G Reset Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Car and RZ/G Reset Controllers provide reset control, and implement the
16 - Latching of the levels on mode pins when PRESET# is negated,
17 - Mode monitoring register,
[all …]
/OK3568_Linux_fs/kernel/drivers/reset/
H A Dreset-hsdk.c17 #include <linux/reset-controller.h>
52 static void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id) in hsdk_reset_config() argument
54 writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL); in hsdk_reset_config()
57 static int hsdk_reset_do(struct hsdk_rst *rst) in hsdk_reset_do() argument
61 reg = readl(rst->regs_rst + CGU_IP_SW_RESET); in hsdk_reset_do()
65 writel(reg, rst->regs_rst + CGU_IP_SW_RESET); in hsdk_reset_do()
68 return readl_poll_timeout_atomic(rst->regs_rst + CGU_IP_SW_RESET, reg, in hsdk_reset_do()
75 struct hsdk_rst *rst = to_hsdk_rst(rcdev); in hsdk_reset_reset() local
79 spin_lock_irqsave(&rst->lock, flags); in hsdk_reset_reset()
80 hsdk_reset_config(rst, id); in hsdk_reset_reset()
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H A Dreset-axs10x.c15 #include <linux/reset-controller.h>
30 struct axs10x_rst *rst = to_axs10x_rst(rcdev); in axs10x_reset_reset() local
33 spin_lock_irqsave(&rst->lock, flags); in axs10x_reset_reset()
34 writel(BIT(id), rst->regs_rst); in axs10x_reset_reset()
35 spin_unlock_irqrestore(&rst->lock, flags); in axs10x_reset_reset()
46 struct axs10x_rst *rst; in axs10x_reset_probe() local
49 rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL); in axs10x_reset_probe()
50 if (!rst) in axs10x_reset_probe()
51 return -ENOMEM; in axs10x_reset_probe()
54 rst->regs_rst = devm_ioremap_resource(&pdev->dev, mem); in axs10x_reset_probe()
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/OK3568_Linux_fs/kernel/Documentation/userspace-api/media/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Rules to convert a .h file to inline RST documentation
5 SRC_DIR=$(srctree)/Documentation/userspace-api/media
6 PARSER = $(srctree)/Documentation/sphinx/parse-headers.pl
10 FILES = audio.h.rst ca.h.rst dmx.h.rst frontend.h.rst net.h.rst video.h.rst \
11 videodev2.h.rst media.h.rst cec.h.rst lirc.h.rst
24 $(BUILDDIR)/audio.h.rst: ${UAPI}/dvb/audio.h ${PARSER} $(SRC_DIR)/audio.h.rst.exceptions
27 $(BUILDDIR)/ca.h.rst: ${UAPI}/dvb/ca.h ${PARSER} $(SRC_DIR)/ca.h.rst.exceptions
30 $(BUILDDIR)/dmx.h.rst: ${UAPI}/dvb/dmx.h ${PARSER} $(SRC_DIR)/dmx.h.rst.exceptions
33 $(BUILDDIR)/frontend.h.rst: ${UAPI}/dvb/frontend.h ${PARSER} $(SRC_DIR)/frontend.h.rst.exceptions
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/OK3568_Linux_fs/kernel/drivers/soc/renesas/
H A Drcar-rst.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
11 #include <linux/soc/renesas/rcar-rst.h>
45 /* RZ/G1 is handled like R-Car Gen2 */
46 { .compatible = "renesas,r8a7742-rst", .data = &rcar_rst_gen2 },
47 { .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
48 { .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
49 { .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
50 { .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
51 /* RZ/G2 is handled like R-Car Gen3 */
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/OK3568_Linux_fs/yocto/poky/documentation/sphinx-static/
H A Dtheme_overrides.css2 SPDX-License-Identifier: CC-BY-SA-2.0-UK
6 font-family: Verdana, Sans, sans-serif;
12 font-family: Arial, Sans;
18 font-size: 2em;
19 text-align: left;
27 font-size: 1.8em;
28 padding-left: 20%;
29 font-weight: normal;
30 font-style: italic;
36 font-size: 1.5em;
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/OK3568_Linux_fs/yocto/poky/bitbake/doc/sphinx-static/
H A Dtheme_overrides.css2 SPDX-License-Identifier: CC-BY-2.0-UK
6 font-family: Verdana, Sans, sans-serif;
12 font-family: Arial, Sans;
18 font-size: 2em;
19 text-align: left;
27 font-size: 1.8em;
28 padding-left: 20%;
29 font-weight: normal;
30 font-style: italic;
36 font-size: 1.5em;
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/OK3568_Linux_fs/kernel/drivers/memory/tegra/
H A Dtegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/memory/tegra20-mc.h>
199 const struct tegra_mc_reset *rst) in tegra20_mc_hotreset_assert() argument
204 spin_lock_irqsave(&mc->lock, flags); in tegra20_mc_hotreset_assert()
206 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_assert()
207 mc_writel(mc, value & ~BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_assert()
209 spin_unlock_irqrestore(&mc->lock, flags); in tegra20_mc_hotreset_assert()
215 const struct tegra_mc_reset *rst) in tegra20_mc_hotreset_deassert() argument
220 spin_lock_irqsave(&mc->lock, flags); in tegra20_mc_hotreset_deassert()
222 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_deassert()
[all …]
H A Dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
24 { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc },
27 { .compatible = "nvidia,tegra30-mc", .data = &tegra30_mc_soc },
30 { .compatible = "nvidia,tegra114-mc", .data = &tegra114_mc_soc },
33 { .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
36 { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
39 { .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
46 const struct tegra_mc_reset *rst) in tegra_mc_block_dma_common() argument
51 spin_lock_irqsave(&mc->lock, flags); in tegra_mc_block_dma_common()
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/OK3568_Linux_fs/kernel/Documentation/sphinx-static/
H A Dtheme_overrides.css1 /* -*- coding: utf-8; mode: css -*-
10 font-family: serif;
12 font-size: 100%;
15 h1, h2, .rst-content .toctree-wrapper p.caption, h3, h4, h5, h6, legend {
16 font-family: sans-serif;
19 .wy-menu-vertical li.current a {
23 .wy-menu-vertical li.on a, .wy-menu-vertical li.current > a {
28 font-family: monospace;
30 font-size: 100%;
33 .wy-menu-vertical {
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/OK3568_Linux_fs/u-boot/drivers/reset/
H A Dreset-scmi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2020 Linaro Limited
8 #include <reset-uclass.h>
13 static int scmi_reset_set_level(struct reset_ctl *rst, bool assert_not_deassert) in scmi_reset_set_level() argument
16 .domain_id = rst->id, in scmi_reset_set_level()
26 ret = devm_scmi_process_msg(rst->dev->parent, &msg); in scmi_reset_set_level()
33 static int scmi_reset_assert(struct reset_ctl *rst) in scmi_reset_assert() argument
35 return scmi_reset_set_level(rst, true); in scmi_reset_assert()
38 static int scmi_reset_deassert(struct reset_ctl *rst) in scmi_reset_deassert() argument
40 return scmi_reset_set_level(rst, false); in scmi_reset_deassert()
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H A Dreset-bcm6345.c7 * SPDX-License-Identifier: GPL-2.0+
13 #include <reset-uclass.h>
22 static int bcm6345_reset_assert(struct reset_ctl *rst) in bcm6345_reset_assert() argument
24 struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev); in bcm6345_reset_assert()
26 clrbits_be32(priv->regs, BIT(rst->id)); in bcm6345_reset_assert()
32 static int bcm6345_reset_deassert(struct reset_ctl *rst) in bcm6345_reset_deassert() argument
34 struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev); in bcm6345_reset_deassert()
36 setbits_be32(priv->regs, BIT(rst->id)); in bcm6345_reset_deassert()
42 static int bcm6345_reset_free(struct reset_ctl *rst) in bcm6345_reset_free() argument
47 static int bcm6345_reset_request(struct reset_ctl *rst) in bcm6345_reset_request() argument
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/agilex-clock.h>
12 compatible = "intel,socfpga-agilex";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/translations/zh_CN/process/
H A Dhowto.rst3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: :ref:`Documentation/process/howto.rst <process_howto>`
9 英文版维护者： Greg Kroah-Hartman <greg@kroah.com>
29 ----
41 - "The C Programming Language" by Kernighan and Ritchie [Prentice Hall]
43 - "Practical C Programming" by Steve Oualline [O'Reilly]
45 - "C: A Reference Manual" by Harbison and Steele [Prentice Hall]
62 --------
67 :ref:`Documentation/translations/zh_CN/process/license-rules.rst <cn_kernel_licensing>`
72 https://www.gnu.org/licenses/gpl-faq.html
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H A D5.Posting.rst1 .. include:: ../disclaimer-zh_CN.rst
3 :Original: :ref:`Documentation/process/5.Posting.rst <development_posting>`
15 :ref:`Documentation/translations/zh_CN/process/submitting-patches.rst <cn_submittingpatches>`,
16 :ref:`Documentation/process/submitting-drivers.rst <submittingdrivers>`
17 和 :ref:`Documentation/translations/zh_CN/process/submit-checklist.rst <cn_submitchecklist>`.
20 --------
32 ------------
36 - 尽可能地测试代码。利用内核的调试工具，确保内核使用所有合理的配置选项组合
39 - 确保您的代码符合内核编码风格指南。
41 - 您的更改是否具有性能影响？如果是这样，您应该运行基准测试来显示您的变更的
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/OK3568_Linux_fs/kernel/drivers/reset/sti/
H A Dreset-syscfg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Inspired by mach-imx/src.c
17 #include "reset-syscfg.h"
20 * struct syscfg_reset_channel - Reset channel regmap configuration
31 * struct syscfg_reset_controller - A reset controller which groups together
35 * @rst: base reset controller structure.
41 struct reset_controller_dev rst; member
47 container_of(_rst, struct syscfg_reset_controller, rst)
52 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev); in syscfg_reset_program_hw() local
54 u32 ctrl_val = rst->active_low ? !assert : !!assert; in syscfg_reset_program_hw()
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/OK3568_Linux_fs/buildroot/dl/python-setuptools/
HDsetuptools-62.6.0.tar.gz ... setuptools-62.6.0/ setuptools-62.6.0/CHANGES.rst setuptools-62.6.0/ ...
/OK3568_Linux_fs/kernel/drivers/rknpu/
H A Drknpu_reset.c1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Felix Zeng <felix.zeng@rock-chips.com>
16 struct reset_control *rst = NULL; in rknpu_reset_control_get() local
18 rst = devm_reset_control_get(dev, name); in rknpu_reset_control_get()
19 if (IS_ERR(rst)) in rknpu_reset_control_get()
22 name, PTR_ERR(rst)); in rknpu_reset_control_get()
24 return rst; in rknpu_reset_control_get()
35 for (i = 0; i < rknpu_dev->config->num_resets; i++) { in rknpu_reset_get()
37 rknpu_dev->dev, in rknpu_reset_get()
38 rknpu_dev->config->resets[i].srst_a_name); in rknpu_reset_get()
[all …]
/OK3568_Linux_fs/kernel/Documentation/filesystems/ext4/
H A Doverview.rst1 .. SPDX-License-Identifier: GPL-2.0
15 All fields in ext4 are written to disk in little-endian order. HOWEVER,
16 all fields in jbd2 (the journal) are written to disk in big-endian
19 .. include:: blocks.rst
20 .. include:: blockgroup.rst
21 .. include:: special_inodes.rst
22 .. include:: allocators.rst
23 .. include:: checksums.rst
24 .. include:: bigalloc.rst
25 .. include:: inlinedata.rst
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
[all …]
/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-inno-usb3.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on phy-rockchip-inno-usb3.c in Linux Kernel.
12 #include <generic-phy.h>
89 * struct rockchip_u3phy_apbcfg: usb3-phy apb configuration.
90 * @u2_pre_emp: usb2-phy pre-emphasis tuning.
91 * @u2_pre_emp_sth: usb2-phy pre-emphasis strength tuning.
92 * @u2_odt_tuning: usb2-phy odt 45ohm tuning.
132 unsigned int tmp = desired ? reg->dvalue : reg->rvalue; in param_write()
135 mask = GENMASK(reg->bitend, reg->bitstart); in param_write()
136 val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT); in param_write()
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/qcom/
H A Dreset.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/reset-controller.h>
16 rcdev->ops->assert(rcdev, id); in qcom_reset()
18 rcdev->ops->deassert(rcdev, id); in qcom_reset()
25 struct qcom_reset_controller *rst; in qcom_reset_assert() local
29 rst = to_qcom_reset_controller(rcdev); in qcom_reset_assert()
30 map = &rst->reset_map[id]; in qcom_reset_assert()
31 mask = BIT(map->bit); in qcom_reset_assert()
33 return regmap_update_bits(rst->regmap, map->reg, mask, mask); in qcom_reset_assert()
39 struct qcom_reset_controller *rst; in qcom_reset_deassert() local
[all …]
/OK3568_Linux_fs/buildroot/package/python-hpack/
H A D0001-Convert-HISTORY.rst-from-UTF-8-format-to-ASCII.patch4 Subject: [PATCH] Convert HISTORY.rst from UTF-8 format to ASCII
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 UTF-8 formatted file breaks installations on some systems:
13 long_description=open('README.rst').read() + '\n\n' + open('HISTORY.rst').read(),
14 …File "/home/peko/autobuild/instance-1/output/target/usr/lib/python3.6/encodings/ascii.py", line 26…
20 Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
21 ---
22 HISTORY.rst | 2 +-
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/OK3568_Linux_fs/kernel/drivers/reset/hisilicon/
H A Dreset-hi3660.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2016-2017 Linaro Ltd.
4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
12 #include <linux/reset-controller.h>
15 struct reset_controller_dev rst; member
20 container_of(_rst, struct hi3660_reset_controller, rst)
30 return regmap_write(rc->map, offset, mask); in hi3660_reset_program_hw()
32 return regmap_write(rc->map, offset + 4, mask); in hi3660_reset_program_hw()
70 offset = reset_spec->args[0]; in hi3660_reset_xlate()
71 bit = reset_spec->args[1]; in hi3660_reset_xlate()
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