1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2013 STMicroelectronics Limited
4*4882a593Smuzhiyun * Author: Stephen Gallimore <stephen.gallimore@st.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Inspired by mach-imx/src.c
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/platform_device.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/of_device.h>
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "reset-syscfg.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /**
20*4882a593Smuzhiyun * struct syscfg_reset_channel - Reset channel regmap configuration
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * @reset: regmap field for the channel's reset bit.
23*4882a593Smuzhiyun * @ack: regmap field for the channel's ack bit (optional).
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun struct syscfg_reset_channel {
26*4882a593Smuzhiyun struct regmap_field *reset;
27*4882a593Smuzhiyun struct regmap_field *ack;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /**
31*4882a593Smuzhiyun * struct syscfg_reset_controller - A reset controller which groups together
32*4882a593Smuzhiyun * a set of related reset bits, which may be located in different system
33*4882a593Smuzhiyun * configuration registers.
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * @rst: base reset controller structure.
36*4882a593Smuzhiyun * @active_low: are the resets in this controller active low, i.e. clearing
37*4882a593Smuzhiyun * the reset bit puts the hardware into reset.
38*4882a593Smuzhiyun * @channels: An array of reset channels for this controller.
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun struct syscfg_reset_controller {
41*4882a593Smuzhiyun struct reset_controller_dev rst;
42*4882a593Smuzhiyun bool active_low;
43*4882a593Smuzhiyun struct syscfg_reset_channel *channels;
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define to_syscfg_reset_controller(_rst) \
47*4882a593Smuzhiyun container_of(_rst, struct syscfg_reset_controller, rst)
48*4882a593Smuzhiyun
syscfg_reset_program_hw(struct reset_controller_dev * rcdev,unsigned long idx,int assert)49*4882a593Smuzhiyun static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
50*4882a593Smuzhiyun unsigned long idx, int assert)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
53*4882a593Smuzhiyun const struct syscfg_reset_channel *ch;
54*4882a593Smuzhiyun u32 ctrl_val = rst->active_low ? !assert : !!assert;
55*4882a593Smuzhiyun int err;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (idx >= rcdev->nr_resets)
58*4882a593Smuzhiyun return -EINVAL;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun ch = &rst->channels[idx];
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun err = regmap_field_write(ch->reset, ctrl_val);
63*4882a593Smuzhiyun if (err)
64*4882a593Smuzhiyun return err;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun if (ch->ack) {
67*4882a593Smuzhiyun unsigned long timeout = jiffies + msecs_to_jiffies(1000);
68*4882a593Smuzhiyun u32 ack_val;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun while (true) {
71*4882a593Smuzhiyun err = regmap_field_read(ch->ack, &ack_val);
72*4882a593Smuzhiyun if (err)
73*4882a593Smuzhiyun return err;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (ack_val == ctrl_val)
76*4882a593Smuzhiyun break;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (time_after(jiffies, timeout))
79*4882a593Smuzhiyun return -ETIME;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun cpu_relax();
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun return 0;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
syscfg_reset_assert(struct reset_controller_dev * rcdev,unsigned long idx)88*4882a593Smuzhiyun static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
89*4882a593Smuzhiyun unsigned long idx)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun return syscfg_reset_program_hw(rcdev, idx, true);
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
syscfg_reset_deassert(struct reset_controller_dev * rcdev,unsigned long idx)94*4882a593Smuzhiyun static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
95*4882a593Smuzhiyun unsigned long idx)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun return syscfg_reset_program_hw(rcdev, idx, false);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
syscfg_reset_dev(struct reset_controller_dev * rcdev,unsigned long idx)100*4882a593Smuzhiyun static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
101*4882a593Smuzhiyun unsigned long idx)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun int err;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun err = syscfg_reset_assert(rcdev, idx);
106*4882a593Smuzhiyun if (err)
107*4882a593Smuzhiyun return err;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun return syscfg_reset_deassert(rcdev, idx);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
syscfg_reset_status(struct reset_controller_dev * rcdev,unsigned long idx)112*4882a593Smuzhiyun static int syscfg_reset_status(struct reset_controller_dev *rcdev,
113*4882a593Smuzhiyun unsigned long idx)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
116*4882a593Smuzhiyun const struct syscfg_reset_channel *ch;
117*4882a593Smuzhiyun u32 ret_val = 0;
118*4882a593Smuzhiyun int err;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if (idx >= rcdev->nr_resets)
121*4882a593Smuzhiyun return -EINVAL;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun ch = &rst->channels[idx];
124*4882a593Smuzhiyun if (ch->ack)
125*4882a593Smuzhiyun err = regmap_field_read(ch->ack, &ret_val);
126*4882a593Smuzhiyun else
127*4882a593Smuzhiyun err = regmap_field_read(ch->reset, &ret_val);
128*4882a593Smuzhiyun if (err)
129*4882a593Smuzhiyun return err;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun return rst->active_low ? !ret_val : !!ret_val;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun static const struct reset_control_ops syscfg_reset_ops = {
135*4882a593Smuzhiyun .reset = syscfg_reset_dev,
136*4882a593Smuzhiyun .assert = syscfg_reset_assert,
137*4882a593Smuzhiyun .deassert = syscfg_reset_deassert,
138*4882a593Smuzhiyun .status = syscfg_reset_status,
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun
syscfg_reset_controller_register(struct device * dev,const struct syscfg_reset_controller_data * data)141*4882a593Smuzhiyun static int syscfg_reset_controller_register(struct device *dev,
142*4882a593Smuzhiyun const struct syscfg_reset_controller_data *data)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct syscfg_reset_controller *rc;
145*4882a593Smuzhiyun int i, err;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
148*4882a593Smuzhiyun if (!rc)
149*4882a593Smuzhiyun return -ENOMEM;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun rc->channels = devm_kcalloc(dev, data->nr_channels,
152*4882a593Smuzhiyun sizeof(*rc->channels), GFP_KERNEL);
153*4882a593Smuzhiyun if (!rc->channels)
154*4882a593Smuzhiyun return -ENOMEM;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun rc->rst.ops = &syscfg_reset_ops,
157*4882a593Smuzhiyun rc->rst.of_node = dev->of_node;
158*4882a593Smuzhiyun rc->rst.nr_resets = data->nr_channels;
159*4882a593Smuzhiyun rc->active_low = data->active_low;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun for (i = 0; i < data->nr_channels; i++) {
162*4882a593Smuzhiyun struct regmap *map;
163*4882a593Smuzhiyun struct regmap_field *f;
164*4882a593Smuzhiyun const char *compatible = data->channels[i].compatible;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun map = syscon_regmap_lookup_by_compatible(compatible);
167*4882a593Smuzhiyun if (IS_ERR(map))
168*4882a593Smuzhiyun return PTR_ERR(map);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
171*4882a593Smuzhiyun if (IS_ERR(f))
172*4882a593Smuzhiyun return PTR_ERR(f);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun rc->channels[i].reset = f;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun if (!data->wait_for_ack)
177*4882a593Smuzhiyun continue;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
180*4882a593Smuzhiyun if (IS_ERR(f))
181*4882a593Smuzhiyun return PTR_ERR(f);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun rc->channels[i].ack = f;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun err = reset_controller_register(&rc->rst);
187*4882a593Smuzhiyun if (!err)
188*4882a593Smuzhiyun dev_info(dev, "registered\n");
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return err;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
syscfg_reset_probe(struct platform_device * pdev)193*4882a593Smuzhiyun int syscfg_reset_probe(struct platform_device *pdev)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun struct device *dev = pdev ? &pdev->dev : NULL;
196*4882a593Smuzhiyun const struct of_device_id *match;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun if (!dev || !dev->driver)
199*4882a593Smuzhiyun return -ENODEV;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun match = of_match_device(dev->driver->of_match_table, dev);
202*4882a593Smuzhiyun if (!match || !match->data)
203*4882a593Smuzhiyun return -EINVAL;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun return syscfg_reset_controller_register(dev, match->data);
206*4882a593Smuzhiyun }
207