xref: /OK3568_Linux_fs/kernel/drivers/reset/reset-axs10x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2017 Synopsys.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Synopsys AXS10x reset driver.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This file is licensed under the terms of the GNU General Public
7*4882a593Smuzhiyun  * License version 2. This program is licensed "as is" without any
8*4882a593Smuzhiyun  * warranty of any kind, whether express or implied.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/io.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/reset-controller.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define to_axs10x_rst(p)	container_of((p), struct axs10x_rst, rcdev)
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define AXS10X_MAX_RESETS	32
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun struct axs10x_rst {
22*4882a593Smuzhiyun 	void __iomem			*regs_rst;
23*4882a593Smuzhiyun 	spinlock_t			lock;
24*4882a593Smuzhiyun 	struct reset_controller_dev	rcdev;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
axs10x_reset_reset(struct reset_controller_dev * rcdev,unsigned long id)27*4882a593Smuzhiyun static int axs10x_reset_reset(struct reset_controller_dev *rcdev,
28*4882a593Smuzhiyun 			      unsigned long id)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	struct axs10x_rst *rst = to_axs10x_rst(rcdev);
31*4882a593Smuzhiyun 	unsigned long flags;
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 	spin_lock_irqsave(&rst->lock, flags);
34*4882a593Smuzhiyun 	writel(BIT(id), rst->regs_rst);
35*4882a593Smuzhiyun 	spin_unlock_irqrestore(&rst->lock, flags);
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	return 0;
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun static const struct reset_control_ops axs10x_reset_ops = {
41*4882a593Smuzhiyun 	.reset	= axs10x_reset_reset,
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
axs10x_reset_probe(struct platform_device * pdev)44*4882a593Smuzhiyun static int axs10x_reset_probe(struct platform_device *pdev)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	struct axs10x_rst *rst;
47*4882a593Smuzhiyun 	struct resource *mem;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL);
50*4882a593Smuzhiyun 	if (!rst)
51*4882a593Smuzhiyun 		return -ENOMEM;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
54*4882a593Smuzhiyun 	rst->regs_rst = devm_ioremap_resource(&pdev->dev, mem);
55*4882a593Smuzhiyun 	if (IS_ERR(rst->regs_rst))
56*4882a593Smuzhiyun 		return PTR_ERR(rst->regs_rst);
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	spin_lock_init(&rst->lock);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	rst->rcdev.owner = THIS_MODULE;
61*4882a593Smuzhiyun 	rst->rcdev.ops = &axs10x_reset_ops;
62*4882a593Smuzhiyun 	rst->rcdev.of_node = pdev->dev.of_node;
63*4882a593Smuzhiyun 	rst->rcdev.nr_resets = AXS10X_MAX_RESETS;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	return devm_reset_controller_register(&pdev->dev, &rst->rcdev);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun static const struct of_device_id axs10x_reset_dt_match[] = {
69*4882a593Smuzhiyun 	{ .compatible = "snps,axs10x-reset" },
70*4882a593Smuzhiyun 	{ },
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun static struct platform_driver axs10x_reset_driver = {
74*4882a593Smuzhiyun 	.probe	= axs10x_reset_probe,
75*4882a593Smuzhiyun 	.driver	= {
76*4882a593Smuzhiyun 		.name = "axs10x-reset",
77*4882a593Smuzhiyun 		.of_match_table = axs10x_reset_dt_match,
78*4882a593Smuzhiyun 	},
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun builtin_platform_driver(axs10x_reset_driver);
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun MODULE_AUTHOR("Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>");
83*4882a593Smuzhiyun MODULE_DESCRIPTION("Synopsys AXS10x reset driver");
84*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
85