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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dti,dp83869.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-phy.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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H A Dti,dp83867.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - $ref: "ethernet-controller.yaml#"
14 - Dan Murphy <dmurphy@ti.com>
18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX
19 and 1000BASE-T Ethernet protocols.
21 The DP83867 is designed for easy implementation of 10/100/1000 Mbps Ethernet
34 ti,min-output-impedance:
40 ti,max-output-impedance:
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/OK3568_Linux_fs/kernel/include/uapi/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
57 /* Media-dependent registers. */
58 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
59 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
60 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
61 * Lanes B-D are numbered 134-136. */
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/atheros/atlx/
H A Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
25 #define SPEED_100 100
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
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/OK3568_Linux_fs/kernel/net/ethtool/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
11 [NETIF_F_SG_BIT] = "tx-scatter-gather",
12 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4",
13 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic",
14 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6",
16 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist",
17 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert",
19 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse",
20 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter",
21 [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert",
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/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
53 /* Media-dependent registers. */
54 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
55 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
56 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
57 * Lanes B-D are numbered 134-136. */
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/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
53 /* Media-dependent registers. */
54 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
55 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
56 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
57 * Lanes B-D are numbered 134-136. */
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/dec/tulip/
H A Dde4x5.h16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */
17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */
18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */
19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */
20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */
21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */
22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */
23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */
24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */
25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */
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/OK3568_Linux_fs/u-boot/drivers/usb/eth/
H A DKconfig3 ---help---
12 ---help---
19 ---help---
26 ---help---
27 Say Y here if you would like to support Microchip LAN75XX Hi-Speed
28 USB 2.0 to 10/100/1000 Gigabit Ethernet controller.
29 Supports 10Base-T/ 100Base-TX/1000Base-T.
35 ---help---
37 Gen 1 to 10/100/1000 Gigabit Ethernet controller.
38 Supports 10Base-T/ 100Base-TX/1000Base-T.
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/OK3568_Linux_fs/u-boot/include/linux/
H A Dmdio.h3 * Copyright 2006-2009 Solarflare Communications Inc.
23 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
43 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
44 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
47 /* Media-dependent registers. */
48 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
49 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
50 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
51 * Lanes B-D are numbered 134-136. */
52 #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */
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/OK3568_Linux_fs/u-boot/drivers/net/
H A De1000.h4 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
7 * SPDX-License-Identifier: GPL-2.0+
11 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
37 printf("e1000: %s: ERROR: " fmt, (NIC)->name ,##args)
41 printf("e1000: %s: DEBUG: " fmt, (NIC)->name ,##args)
52 writel((value), ((a)->hw_addr + E1000_##reg))
54 readl((a)->hw_addr + E1000_##reg)
56 writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2)))
58 readl((a)->hw_addr + E1000_##reg + ((offset) << 2))
323 #define IFE_E_PHY_ID 0x02A80330 /* 10/100 PHY */
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H A Dftmac110.h2 * Faraday 10/100Mbps Ethernet Controller
5 * Dante Su <dantesu@faraday-tech.com>
7 * SPDX-License-Identifier: GPL-2.0+
18 uint32_t txpd; /* 0x18: Tx Poll Demand Register */
20 uint32_t txba; /* 0x20: Tx Ring Base Address Register */
21 uint32_t rxba; /* 0x24: Rx Ring Base Address Register */
44 #define ISR_TXLOST (1 << 5) /* tx lost */
45 #define ISR_TXOK (1 << 4) /* tx to ethernet */
46 #define ISR_NOTXBUF (1 << 3) /* out of tx buffer */
47 #define ISR_TXFIFO (1 << 2) /* tx to fifo */
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H A Dsmc91111.h1 /*------------------------------------------------------------------------
2 . smc91111.h - macros for the LAN91C111 Ethernet Driver
5 . Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * SPDX-License-Identifier: GPL-2.0+
28 ---------------------------------------------------------------------------*/
72 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+((r)<<1))))
73 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
75 unsigned int __p = (unsigned int)((a)->iobase + ((p)<<1)); \
81 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
82 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
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H A Dtsi108_eth.c5 * SPDX-License-Identifier: GPL-2.0+
45 #define __REG32(base, offset) (*((volatile u32 *)((char *)(base) + (offset)))) argument
47 #define reg_MAC_CONFIG_1(base) __REG32(base, 0x00000000) argument
62 #define reg_MAC_CONFIG_2(base) __REG32(base, 0x00000004) argument
70 #define INTERFACE_MODE_NIBBLE 1 /* 10/100 Mb/s MII) */
73 #define reg_MAXIMUM_FRAME_LENGTH(base) __REG32(base, 0x00000010) argument
75 #define reg_MII_MGMT_CONFIG(base) __REG32(base, 0x00000020) argument
81 #define reg_MII_MGMT_COMMAND(base) __REG32(base, 0x00000024) argument
85 #define reg_MII_MGMT_ADDRESS(base) __REG32(base, 0x00000028) argument
86 #define reg_MII_MGMT_CONTROL(base) __REG32(base, 0x0000002c) argument
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/OK3568_Linux_fs/kernel/Documentation/networking/device_drivers/ethernet/3com/
H A Dvortex.rst1 .. SPDX-License-Identifier: GPL-2.0
20 - Andrew Morton
21 - Netdev mailing list <netdev@vger.kernel.org>
22 - Linux kernel mailing list <linux-kernel@vger.kernel.org>
28 Since kernel 2.3.99-pre6, this driver incorporates the support for the
29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c.
33 - 3c590 Vortex 10Mbps
34 - 3c592 EISA 10Mbps Demon/Vortex
35 - 3c597 EISA Fast Demon/Vortex
36 - 3c595 Vortex 100baseTx
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/e1000/
H A De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
131 e1000_igp_cable_length_100 = 100,
425 /* MAC decode size is 128K - This is the size of BAR0 */
436 #define SPEED_100 100
446 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
489 * E1000_RAR_ENTRIES - 1 multicast addresses.
506 /* Receive Descriptor - Extended */
532 /* Receive Descriptor - Packet Split */
556 __le16 length[3]; /* length of buffers 1-3 */
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
21 #define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */
23 #define PHY_NEXT_PAGE_TX 0x07 /* Next Page TX */
25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */
26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */
34 #define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
41 #define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
57 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
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/OK3568_Linux_fs/u-boot/doc/
H A DREADME.fec_mxc1 U-Boot config options used in fec_mxc.c
4 Selects fec_mxc.c to be compiled into u-boot. Can read out the
11 Defaults to MII100 for 100 Base-tx.
12 RGMII selects 1000 Base-tx reduced pin count interface.
13 RMII selects 100 Base-tx reduced pin count interface.
24 Relevant only if PHYLIB not used. Skips auto-negotiation restart.
32 phy. This is usefull if there is a direct MAC <-> MAC connection, for
34 ethernet-switch.
37 if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
/OK3568_Linux_fs/kernel/drivers/net/ethernet/dlink/
H A Dsundance.c3 Written 1999-2000 by Donald Becker.
19 [link no longer provides useful info -jgarzik]
27 /* The user-configurable values.
30 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
34 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
37 need a copy-align. */
45 100mbps_hd 100Mbps half duplex.
46 100mbps_fd 100Mbps full duplex.
50 3 100Mbps half duplex.
51 4 100Mbps full duplex.
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/igb/
H A De1000_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
188 #define E1000_CTRL_SPD_100 0x00000100 /* Force 100Mb */
245 #define E1000_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
254 /* Constants used to intrepret the masked PCI-X bus speed. */
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/igc/
H A Digc_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
47 /* Loop limit on how long we wait for auto-negotiation to complete */
51 /* Number of 100 microseconds we wait for PCI Express master disable */
116 #define NWAY_AR_100TX_HD_CAPS 0x0080 /* 100TX Half Duplex Capable */
117 #define NWAY_AR_100TX_FD_CAPS 0x0100 /* 100TX Full Duplex Capable */
121 /* Link Partner Ability Register (Base Page) */
125 /* 1000BASE-T Control Register */
130 /* 1000BASE-T Status Register */
184 #define IGC_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
189 #define SPEED_100 100
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/marvell/
H A Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
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/OK3568_Linux_fs/u-boot/cmd/
H A Dmii.c5 * SPDX-License-Identifier: GPL-2.0+
42 { 11, 11, 0x01, "power-down" },
51 { 15, 15, 0x01, "100BASE-T4 able" },
52 { 14, 14, 0x01, "100BASE-X full duplex able" },
53 { 13, 13, 0x01, "100BASE-X half duplex able" },
56 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
57 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
86 { 9, 9, 0x01, "100BASE-T4 able" },
87 { 8, 8, 0x01, "100BASE-TX full duplex able" },
88 { 7, 7, 0x01, "100BASE-TX able" },
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/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-omap-100k.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * OMAP7xx SPI 100k controller driver
52 #define SPI_CTRL_WORD_SIZE(x) (((x) - 1) << 2)
71 /* Virtual base address of the controller */
72 void __iomem *base; member
76 void __iomem *base; member
86 val = readw(spi100k->base + SPI_SETUP1); in spi100k_enable_clock()
88 writew(val, spi100k->base + SPI_SETUP1); in spi100k_enable_clock()
97 val = readw(spi100k->base + SPI_SETUP1); in spi100k_disable_clock()
99 writew(val, spi100k->base + SPI_SETUP1); in spi100k_disable_clock()
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/OK3568_Linux_fs/kernel/Documentation/networking/device_drivers/ethernet/intel/
H A De100.rst1 .. SPDX-License-Identifier: GPL-2.0+
4 Linux Base Driver for the Intel(R) PRO/100 Family of Adapters
12 - In This Release
13 - Identifying Your Adapter
14 - Building and Installation
15 - Driver Configuration Parameters
16 - Additional Configurations
17 - Known Issues
18 - Support
24 This file describes the Linux Base Driver for the Intel(R) PRO/100 Family of
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