xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/ti,dp83869.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
2*4882a593Smuzhiyun# Copyright (C) 2019 Texas Instruments Incorporated
3*4882a593Smuzhiyun%YAML 1.2
4*4882a593Smuzhiyun---
5*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/net/ti,dp83869.yaml#"
6*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyuntitle: TI DP83869 ethernet PHY
9*4882a593Smuzhiyun
10*4882a593SmuzhiyunallOf:
11*4882a593Smuzhiyun  - $ref: "ethernet-phy.yaml#"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyunmaintainers:
14*4882a593Smuzhiyun  - Dan Murphy <dmurphy@ti.com>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyundescription: |
17*4882a593Smuzhiyun  The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18*4882a593Smuzhiyun  with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19*4882a593Smuzhiyun  1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20*4882a593Smuzhiyun  100BASE-FX Fiber protocols.
21*4882a593Smuzhiyun  This device interfaces to the MAC layer through Reduced GMII (RGMII) and
22*4882a593Smuzhiyun  SGMII The DP83869HM supports Media Conversion in Managed mode. In this mode,
23*4882a593Smuzhiyun  the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
24*4882a593Smuzhiyun  conversions.  The DP83869HM can also support Bridge Conversion from RGMII to
25*4882a593Smuzhiyun  SGMII and SGMII to RGMII.
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun  Specifications about the Ethernet PHY can be found at:
28*4882a593Smuzhiyun    http://www.ti.com/lit/ds/symlink/dp83869hm.pdf
29*4882a593Smuzhiyun
30*4882a593Smuzhiyunproperties:
31*4882a593Smuzhiyun  reg:
32*4882a593Smuzhiyun    maxItems: 1
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  ti,min-output-impedance:
35*4882a593Smuzhiyun    type: boolean
36*4882a593Smuzhiyun    description: |
37*4882a593Smuzhiyun       MAC Interface Impedance control to set the programmable output impedance
38*4882a593Smuzhiyun       to a minimum value (35 ohms).
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun  ti,max-output-impedance:
41*4882a593Smuzhiyun    type: boolean
42*4882a593Smuzhiyun    description: |
43*4882a593Smuzhiyun       MAC Interface Impedance control to set the programmable output impedance
44*4882a593Smuzhiyun       to a maximum value (70 ohms).
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  tx-fifo-depth:
47*4882a593Smuzhiyun    $ref: /schemas/types.yaml#definitions/uint32
48*4882a593Smuzhiyun    description: |
49*4882a593Smuzhiyun       Transmitt FIFO depth see dt-bindings/net/ti-dp83869.h for values
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun  rx-fifo-depth:
52*4882a593Smuzhiyun    $ref: /schemas/types.yaml#definitions/uint32
53*4882a593Smuzhiyun    description: |
54*4882a593Smuzhiyun       Receive FIFO depth see dt-bindings/net/ti-dp83869.h for values
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun  ti,clk-output-sel:
57*4882a593Smuzhiyun    $ref: /schemas/types.yaml#definitions/uint32
58*4882a593Smuzhiyun    description: |
59*4882a593Smuzhiyun       Muxing option for CLK_OUT pin see dt-bindings/net/ti-dp83869.h for values.
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun  ti,op-mode:
62*4882a593Smuzhiyun    $ref: /schemas/types.yaml#definitions/uint32
63*4882a593Smuzhiyun    description: |
64*4882a593Smuzhiyun       Operational mode for the PHY.  If this is not set then the operational
65*4882a593Smuzhiyun       mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun  rx-internal-delay-ps:
68*4882a593Smuzhiyun    description: Delay is in pico seconds
69*4882a593Smuzhiyun    enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
70*4882a593Smuzhiyun            3250, 3500, 3750, 4000 ]
71*4882a593Smuzhiyun    default: 2000
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun  tx-internal-delay-ps:
74*4882a593Smuzhiyun    description: Delay is in pico seconds
75*4882a593Smuzhiyun    enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
76*4882a593Smuzhiyun            3250, 3500, 3750, 4000 ]
77*4882a593Smuzhiyun    default: 2000
78*4882a593Smuzhiyun
79*4882a593Smuzhiyunrequired:
80*4882a593Smuzhiyun  - reg
81*4882a593Smuzhiyun
82*4882a593SmuzhiyununevaluatedProperties: false
83*4882a593Smuzhiyun
84*4882a593Smuzhiyunexamples:
85*4882a593Smuzhiyun  - |
86*4882a593Smuzhiyun    #include <dt-bindings/net/ti-dp83869.h>
87*4882a593Smuzhiyun    mdio0 {
88*4882a593Smuzhiyun      #address-cells = <1>;
89*4882a593Smuzhiyun      #size-cells = <0>;
90*4882a593Smuzhiyun      ethphy0: ethernet-phy@0 {
91*4882a593Smuzhiyun        reg = <0>;
92*4882a593Smuzhiyun        tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
93*4882a593Smuzhiyun        rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
94*4882a593Smuzhiyun        ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>;
95*4882a593Smuzhiyun        ti,max-output-impedance = "true";
96*4882a593Smuzhiyun        ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
97*4882a593Smuzhiyun        rx-internal-delay-ps = <2000>;
98*4882a593Smuzhiyun        tx-internal-delay-ps = <2000>;
99*4882a593Smuzhiyun      };
100*4882a593Smuzhiyun    };
101