| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/bridge/ |
| H A D | toshiba,tc358775.yaml | 28 description: i2c address of the bridge, 0x0f
57 const: 0
59 port@0:
76 - port@0
99 reg = <0x078b8000 0x500>;
102 #size-cells = <0>;
106 reg = <0x0f>;
116 #size-cells = <0>;
118 port@0 {
119 reg = <0>;
[all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/thermal/ |
| H A D | ti,am654-thermal.yaml | 38 reg = <0x42050000 0x25c>;
46 thermal-sensors = <&vtm0 0>;
|
| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | keystone-k2hk.dtsi | 16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
62 reg = <0x0c000000 0x600000>;
63 ranges = <0x0 0x0c000000 0x600000>;
68 reg = <0x5f0000 0x8000>;
78 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
79 0xa40 8 0xa40 8 0x840 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 1: dsp1 */
80 0xa44 8 0xa44 8 0x844 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 2: dsp2 */
81 0xa48 8 0xa48 8 0x848 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 3: dsp3 */
[all …]
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| H A D | imx6dl-pinfunc.h | 13 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
16 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
17 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
20 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
21 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
|
| H A D | imx25-pinfunc.h | 16 #define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000
17 #define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000
19 #define MX25_PAD_A13__A13 0x00c 0x22C 0x000 0x00 0x000
20 #define MX25_PAD_A13__GPIO_4_1 0x00c 0x22C 0x000 0x05 0x000
21 #define MX25_PAD_A13__LCDC_CLS 0x00c 0x22C 0x000 0x07 0x000
23 #define MX25_PAD_A14__A14 0x010 0x230 0x000 0x00 0x000
24 #define MX25_PAD_A14__GPIO_2_0 0x010 0x230 0x000 0x05 0x000
25 #define MX25_PAD_A14__SIM1_CLK1 0x010 0x230 0x000 0x06 0x000
26 #define MX25_PAD_A14__LCDC_SPL 0x010 0x230 0x000 0x07 0x000
28 #define MX25_PAD_A15__A15 0x014 0x234 0x000 0x00 0x000
[all …]
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| H A D | imx6sl-pinfunc.h | 13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
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| H A D | imx35-pinfunc.h | 13 #define MX35_PAD_CAPTURE__GPT_CAPIN1 0x004 0x328 0x000 0x0 0x0
14 #define MX35_PAD_CAPTURE__GPT_CMPOUT2 0x004 0x328 0x000 0x1 0x0
15 #define MX35_PAD_CAPTURE__CSPI2_SS1 0x004 0x328 0x7f4 0x2 0x0
16 #define MX35_PAD_CAPTURE__EPIT1_EPITO 0x004 0x328 0x000 0x3 0x0
17 #define MX35_PAD_CAPTURE__CCM_CLK32K 0x004 0x328 0x7d0 0x4 0x0
18 #define MX35_PAD_CAPTURE__GPIO1_4 0x004 0x328 0x850 0x5 0x0
19 #define MX35_PAD_COMPARE__GPT_CMPOUT1 0x008 0x32c 0x000 0x0 0x0
20 #define MX35_PAD_COMPARE__GPT_CAPIN2 0x008 0x32c 0x000 0x1 0x0
21 #define MX35_PAD_COMPARE__GPT_CMPOUT3 0x008 0x32c 0x000 0x2 0x0
22 #define MX35_PAD_COMPARE__EPIT2_EPITO 0x008 0x32c 0x000 0x3 0x0
[all …]
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| /OK3568_Linux_fs/kernel/drivers/video/rockchip/rve/include/ |
| H A D | rve_reg.h | 8 #define RVE_SWREG0_IVE_VERSION 0x000
9 #define RVE_SWREG1_IVE_IRQ 0x004
10 #define RVE_SWREG2_IRQ_CTRL 0x008
11 #define RVE_SWREG3_IVE_IDLE_PRC_STA 0x00c
12 #define RVE_SWREG4_IVE_FORCE_IDLE_WBASE 0x010
13 #define RVE_SWREG5_IVE_IDLE_CTRL 0x014
14 #define RVE_SWREG6_IVE_WORK_STA 0x018
15 #define RVE_SWREG7_IVE_SWAP 0x01c
18 #define RVE_SWLTB0_START_BASE 0x100
19 #define RVE_SWLTB1_CTRL 0x104
[all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/ |
| H A D | sbgci.h | 48 #define GCI_CORE_IDX(sih) (AOB_ENAB(sih) ? si_findcoreidx(sih, GCI_CORE_ID, 0) : SI_CC_IDX)
51 uint32 gci_corecaps0; /* 0x000 */
52 uint32 gci_corecaps1; /* 0x004 */
53 uint32 gci_corecaps2; /* 0x008 */
54 uint32 gci_corectrl; /* 0x00c */
55 uint32 gci_corestat; /* 0x010 */
56 uint32 gci_intstat; /* 0x014 */
57 uint32 gci_intmask; /* 0x018 */
58 uint32 gci_wakemask; /* 0x01c */
59 uint32 gci_levelintstat; /* 0x020 */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/ |
| H A D | sbgci.h | 48 #define GCI_CORE_IDX(sih) (AOB_ENAB(sih) ? si_findcoreidx(sih, GCI_CORE_ID, 0) : SI_CC_IDX)
51 uint32 gci_corecaps0; /* 0x000 */
52 uint32 gci_corecaps1; /* 0x004 */
53 uint32 gci_corecaps2; /* 0x008 */
54 uint32 gci_corectrl; /* 0x00c */
55 uint32 gci_corestat; /* 0x010 */
56 uint32 gci_intstat; /* 0x014 */
57 uint32 gci_intmask; /* 0x018 */
58 uint32 gci_wakemask; /* 0x01c */
59 uint32 gci_levelintstat; /* 0x020 */
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/ |
| H A D | sbgci.h | 48 #define GCI_CORE_IDX(sih) (AOB_ENAB(sih) ? si_findcoreidx(sih, GCI_CORE_ID, 0) : SI_CC_IDX)
51 uint32 gci_corecaps0; /* 0x000 */
52 uint32 gci_corecaps1; /* 0x004 */
53 uint32 gci_corecaps2; /* 0x008 */
54 uint32 gci_corectrl; /* 0x00c */
55 uint32 gci_corestat; /* 0x010 */
56 uint32 gci_intstat; /* 0x014 */
57 uint32 gci_intmask; /* 0x018 */
58 uint32 gci_wakemask; /* 0x01c */
59 uint32 gci_levelintstat; /* 0x020 */
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | imx6dl-pinfunc.h | 17 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
20 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
21 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
22 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
23 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
24 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
25 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
26 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
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| H A D | keystone-k2hk.dtsi | 14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
50 gpio,syscon-dev = <&devctrl 0x240>;
57 gpio,syscon-dev = <&devctrl 0x244>;
64 gpio,syscon-dev = <&devctrl 0x248>;
71 gpio,syscon-dev = <&devctrl 0x24c>;
78 gpio,syscon-dev = <&devctrl 0x250>;
85 gpio,syscon-dev = <&devctrl 0x254>;
92 gpio,syscon-dev = <&devctrl 0x258>;
[all …]
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| H A D | imx6sl-pinfunc.h | 17 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
18 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
19 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
20 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
21 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
22 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
23 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
24 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
25 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
26 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
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| /OK3568_Linux_fs/kernel/drivers/clk/meson/ |
| H A D | axg.h | 19 #define HHI_MIPI_CNTL0 0x00
20 #define HHI_GP0_PLL_CNTL 0x40
21 #define HHI_GP0_PLL_CNTL2 0x44
22 #define HHI_GP0_PLL_CNTL3 0x48
23 #define HHI_GP0_PLL_CNTL4 0x4c
24 #define HHI_GP0_PLL_CNTL5 0x50
25 #define HHI_GP0_PLL_STS 0x54
26 #define HHI_GP0_PLL_CNTL1 0x58
27 #define HHI_HIFI_PLL_CNTL 0x80
28 #define HHI_HIFI_PLL_CNTL2 0x84
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra124/ |
| H A D | mc.h | 14 u32 reserved0[4]; /* offset 0x00 - 0x0C */
15 u32 mc_smmu_config; /* offset 0x10 */
16 u32 mc_smmu_tlb_config; /* offset 0x14 */
17 u32 mc_smmu_ptc_config; /* offset 0x18 */
18 u32 mc_smmu_ptb_asid; /* offset 0x1C */
19 u32 mc_smmu_ptb_data; /* offset 0x20 */
20 u32 reserved1[3]; /* offset 0x24 - 0x2C */
21 u32 mc_smmu_tlb_flush; /* offset 0x30 */
22 u32 mc_smmu_ptc_flush; /* offset 0x34 */
23 u32 reserved2[6]; /* offset 0x38 - 0x4C */
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra210/ |
| H A D | mc.h | 14 u32 reserved0[4]; /* offset 0x00 - 0x0C */
15 u32 mc_smmu_config; /* offset 0x10 */
16 u32 mc_smmu_tlb_config; /* offset 0x14 */
17 u32 mc_smmu_ptc_config; /* offset 0x18 */
18 u32 mc_smmu_ptb_asid; /* offset 0x1C */
19 u32 mc_smmu_ptb_data; /* offset 0x20 */
20 u32 reserved1[3]; /* offset 0x24 - 0x2C */
21 u32 mc_smmu_tlb_flush; /* offset 0x30 */
22 u32 mc_smmu_ptc_flush; /* offset 0x34 */
23 u32 reserved2[6]; /* offset 0x38 - 0x4C */
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65-wakeup.dtsi | 39 reg = <0x43000014 0x4>;
44 reg = <0x4301c000 0x118>;
47 pinctrl-single,function-mask = <0xffffffff>;
52 reg = <0x42300000 0x100>;
63 reg = <0x42120000 0x100>;
66 #size-cells = <0>;
80 ti,interrupt-ranges = <0 712 16>;
85 reg = <0x42110000 0x100>;
93 ti,davinci-gpio-unbanked = <0>;
94 clocks = <&k3_clks 59 0>;
[all …]
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| /OK3568_Linux_fs/kernel/arch/arm/include/asm/ |
| H A D | v7m.h | 5 #define V7M_SCS_ICTR IOMEM(0xe000e004)
6 #define V7M_SCS_ICTR_INTLINESNUM_MASK 0x0000000f
8 #define BASEADDR_V7M_SCB IOMEM(0xe000ed00)
10 #define V7M_SCB_CPUID 0x00
12 #define V7M_SCB_ICSR 0x04
17 #define V7M_SCB_VTOR 0x08
19 #define V7M_SCB_AIRCR 0x0c
20 #define V7M_SCB_AIRCR_VECTKEY (0x05fa << 16)
23 #define V7M_SCB_SCR 0x10
26 #define V7M_SCB_CCR 0x14
[all …]
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/netlogic/xlp-hal/ |
| H A D | pcibus.h | 39 #define PCIE_MEM_BASE 0xd0000000ULL
40 #define PCIE_MEM_LIMIT 0xdfffffffULL
41 #define PCIE_IO_BASE 0x14000000ULL
42 #define PCIE_IO_LIMIT 0x15ffffffULL
44 #define PCIE_BRIDGE_CMD 0x1
45 #define PCIE_BRIDGE_MSI_CAP 0x14
46 #define PCIE_BRIDGE_MSI_ADDRL 0x15
47 #define PCIE_BRIDGE_MSI_ADDRH 0x16
48 #define PCIE_BRIDGE_MSI_DATA 0x17
51 #define PCIE_BYTE_SWAP_MEM_BASE 0x247
[all …]
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| /OK3568_Linux_fs/kernel/tools/perf/arch/powerpc/util/ |
| H A D | book3s_hcalls.h | 9 {0x4, "H_REMOVE"}, \
10 {0x8, "H_ENTER"}, \
11 {0xc, "H_READ"}, \
12 {0x10, "H_CLEAR_MOD"}, \
13 {0x14, "H_CLEAR_REF"}, \
14 {0x18, "H_PROTECT"}, \
15 {0x1c, "H_GET_TCE"}, \
16 {0x20, "H_PUT_TCE"}, \
17 {0x24, "H_SET_SPRG0"}, \
18 {0x28, "H_SET_DABR"}, \
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-zynq/include/mach/ |
| H A D | hardware.h | 10 #define ZYNQ_SYS_CTRL_BASEADDR 0xF8000000
11 #define ZYNQ_DEV_CFG_APB_BASEADDR 0xF8007000
12 #define ZYNQ_SCU_BASEADDR 0xF8F00000
13 #define ZYNQ_GEM_BASEADDR0 0xE000B000
14 #define ZYNQ_GEM_BASEADDR1 0xE000C000
15 #define ZYNQ_I2C_BASEADDR0 0xE0004000
16 #define ZYNQ_I2C_BASEADDR1 0xE0005000
17 #define ZYNQ_QSPI_BASEADDR 0xE000D000
18 #define ZYNQ_SMC_BASEADDR 0xE000E000
19 #define ZYNQ_NAND_BASEADDR 0xE1000000
[all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-uniphier/arm32/ |
| H A D | lowlevel_init.S | 24 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
26 mcr p15, 0, r0, c1, c0, 0
43 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
45 mcr p15, 0, r0, c1, c0, 0
54 mrc p15, 0, r0, c2, c0, 2 @ TTBCR (Translation Table Base Control Register)
55 bic r0, r0, #0x37
56 orr r0, r0, #0x20 @ disable TTBR1
57 mcr p15, 0, r0, c2, c0, 2
59 orr r0, r12, #0x8 @ Outer Cacheability for table walks: WBWA
60 mcr p15, 0, r0, c2, c0, 0 @ TTBR0
[all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/ |
| H A D | rk3066_hdmi.h | 10 #define GRF_SOC_CON0 0x150
13 #define DDC_SEGMENT_ADDR 0x30
15 #define HDMI_MAXIMUM_INFO_FRAME_SIZE 0x11
17 #define N_32K 0x1000
18 #define N_441K 0x1880
19 #define N_882K 0x3100
20 #define N_1764K 0x6200
21 #define N_48K 0x1800
22 #define N_96K 0x3000
23 #define N_192K 0x6000
[all …]
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| /OK3568_Linux_fs/kernel/drivers/media/pci/tw68/ |
| H A D | tw68-reg.h | 23 #define TW68_DMAC 0x000
24 #define TW68_DMAP_SA 0x004
25 #define TW68_DMAP_EXE 0x008
26 #define TW68_DMAP_PP 0x00c
27 #define TW68_VBIC 0x010
28 #define TW68_SBUSC 0x014
29 #define TW68_SBUSSD 0x018
30 #define TW68_INTSTAT 0x01C
31 #define TW68_INTMASK 0x020
32 #define TW68_GPIOC 0x024
[all …]
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