1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree Source for AM6 SoC Family Wakeup Domain peripherals 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun&cbass_wakeup { 9*4882a593Smuzhiyun dmsc: dmsc { 10*4882a593Smuzhiyun compatible = "ti,am654-sci"; 11*4882a593Smuzhiyun ti,host-id = <12>; 12*4882a593Smuzhiyun #address-cells = <1>; 13*4882a593Smuzhiyun #size-cells = <1>; 14*4882a593Smuzhiyun ranges; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun mbox-names = "rx", "tx"; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun mboxes= <&secure_proxy_main 11>, 19*4882a593Smuzhiyun <&secure_proxy_main 13>; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun k3_pds: power-controller { 22*4882a593Smuzhiyun compatible = "ti,sci-pm-domain"; 23*4882a593Smuzhiyun #power-domain-cells = <2>; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun k3_clks: clocks { 27*4882a593Smuzhiyun compatible = "ti,k2g-sci-clk"; 28*4882a593Smuzhiyun #clock-cells = <2>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun k3_reset: reset-controller { 32*4882a593Smuzhiyun compatible = "ti,sci-reset"; 33*4882a593Smuzhiyun #reset-cells = <2>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun chipid@43000014 { 38*4882a593Smuzhiyun compatible = "ti,am654-chipid"; 39*4882a593Smuzhiyun reg = <0x43000014 0x4>; 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun wkup_pmx0: pinctrl@4301c000 { 43*4882a593Smuzhiyun compatible = "pinctrl-single"; 44*4882a593Smuzhiyun reg = <0x4301c000 0x118>; 45*4882a593Smuzhiyun #pinctrl-cells = <1>; 46*4882a593Smuzhiyun pinctrl-single,register-width = <32>; 47*4882a593Smuzhiyun pinctrl-single,function-mask = <0xffffffff>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun wkup_uart0: serial@42300000 { 51*4882a593Smuzhiyun compatible = "ti,am654-uart"; 52*4882a593Smuzhiyun reg = <0x42300000 0x100>; 53*4882a593Smuzhiyun reg-shift = <2>; 54*4882a593Smuzhiyun reg-io-width = <4>; 55*4882a593Smuzhiyun interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>; 56*4882a593Smuzhiyun clock-frequency = <48000000>; 57*4882a593Smuzhiyun current-speed = <115200>; 58*4882a593Smuzhiyun power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun wkup_i2c0: i2c@42120000 { 62*4882a593Smuzhiyun compatible = "ti,am654-i2c", "ti,omap4-i2c"; 63*4882a593Smuzhiyun reg = <0x42120000 0x100>; 64*4882a593Smuzhiyun interrupts = <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>; 65*4882a593Smuzhiyun #address-cells = <1>; 66*4882a593Smuzhiyun #size-cells = <0>; 67*4882a593Smuzhiyun clock-names = "fck"; 68*4882a593Smuzhiyun clocks = <&k3_clks 115 1>; 69*4882a593Smuzhiyun power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun intr_wkup_gpio: interrupt-controller2 { 73*4882a593Smuzhiyun compatible = "ti,sci-intr"; 74*4882a593Smuzhiyun ti,intr-trigger-type = <1>; 75*4882a593Smuzhiyun interrupt-controller; 76*4882a593Smuzhiyun interrupt-parent = <&gic500>; 77*4882a593Smuzhiyun #interrupt-cells = <1>; 78*4882a593Smuzhiyun ti,sci = <&dmsc>; 79*4882a593Smuzhiyun ti,sci-dev-id = <156>; 80*4882a593Smuzhiyun ti,interrupt-ranges = <0 712 16>; 81*4882a593Smuzhiyun }; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun wkup_gpio0: gpio@42110000 { 84*4882a593Smuzhiyun compatible = "ti,am654-gpio", "ti,keystone-gpio"; 85*4882a593Smuzhiyun reg = <0x42110000 0x100>; 86*4882a593Smuzhiyun gpio-controller; 87*4882a593Smuzhiyun #gpio-cells = <2>; 88*4882a593Smuzhiyun interrupt-parent = <&intr_wkup_gpio>; 89*4882a593Smuzhiyun interrupts = <60>, <61>, <62>, <63>; 90*4882a593Smuzhiyun interrupt-controller; 91*4882a593Smuzhiyun #interrupt-cells = <2>; 92*4882a593Smuzhiyun ti,ngpio = <56>; 93*4882a593Smuzhiyun ti,davinci-gpio-unbanked = <0>; 94*4882a593Smuzhiyun clocks = <&k3_clks 59 0>; 95*4882a593Smuzhiyun clock-names = "gpio"; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun wkup_vtm0: temperature-sensor@42050000 { 99*4882a593Smuzhiyun compatible = "ti,am654-vtm"; 100*4882a593Smuzhiyun reg = <0x42050000 0x25c>; 101*4882a593Smuzhiyun power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; 102*4882a593Smuzhiyun #thermal-sensor-cells = <1>; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun thermal_zones: thermal-zones { 106*4882a593Smuzhiyun #include "k3-am654-industrial-thermal.dtsi" 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun}; 109