Lines Matching +full:0 +full:x25c
24 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
26 mcr p15, 0, r0, c1, c0, 0
43 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
45 mcr p15, 0, r0, c1, c0, 0
54 mrc p15, 0, r0, c2, c0, 2 @ TTBCR (Translation Table Base Control Register)
55 bic r0, r0, #0x37
56 orr r0, r0, #0x20 @ disable TTBR1
57 mcr p15, 0, r0, c2, c0, 2
59 orr r0, r12, #0x8 @ Outer Cacheability for table walks: WBWA
60 mcr p15, 0, r0, c2, c0, 0 @ TTBR0
62 mov r0, #0
63 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs
66 mcr p15, 0, r0, c3, c0, 0 @ DACR (Domain Access Control Register)
75 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
77 mcr p15, 0, r0, c1, c0, 0
88 #define BOOT_RAM_WAYS (0x00000100) @ way 8
90 #define SSCO_BASE 0x506c0000
91 #define SSCOPE 0x244
92 #define SSCOQM 0x248
93 #define SSCOQAD 0x24c
94 #define SSCOQSZ 0x250
95 #define SSCOQWN 0x258
96 #define SSCOPPQSEF 0x25c
97 #define SSCOLPQS 0x260
103 0: ldr r0, = 0x00408006 @ touch to zero with address range
112 cmp r0, #0 @ check if the command is successfully set
113 bne 0b @ try again if an error occurs
116 cmp r0, #0x4
123 #define DEVICE 0x00002002 /* Non-shareable Device */
124 #define NORMAL 0x0000000e /* Normal Memory Write-Back, No Write-Allocate */
130 0: str r0, [r1], #4 @ specify all the sections as Device
131 adds r0, r0, #0x00100000
132 bcc 0b
136 add r0, r0, #0x00100000