1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __RVE_REG_H__ 3*4882a593Smuzhiyun #define __RVE_REG_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include "rve_drv.h" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* sys reg */ 8*4882a593Smuzhiyun #define RVE_SWREG0_IVE_VERSION 0x000 9*4882a593Smuzhiyun #define RVE_SWREG1_IVE_IRQ 0x004 10*4882a593Smuzhiyun #define RVE_SWREG2_IRQ_CTRL 0x008 11*4882a593Smuzhiyun #define RVE_SWREG3_IVE_IDLE_PRC_STA 0x00c 12*4882a593Smuzhiyun #define RVE_SWREG4_IVE_FORCE_IDLE_WBASE 0x010 13*4882a593Smuzhiyun #define RVE_SWREG5_IVE_IDLE_CTRL 0x014 14*4882a593Smuzhiyun #define RVE_SWREG6_IVE_WORK_STA 0x018 15*4882a593Smuzhiyun #define RVE_SWREG7_IVE_SWAP 0x01c 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* llp reg */ 18*4882a593Smuzhiyun #define RVE_SWLTB0_START_BASE 0x100 19*4882a593Smuzhiyun #define RVE_SWLTB1_CTRL 0x104 20*4882a593Smuzhiyun #define RVE_SWLTB2_CFG_DONE 0x108 21*4882a593Smuzhiyun #define RVE_SWLTB3_ENABLE 0x10c 22*4882a593Smuzhiyun #define RVE_SWLTB4_PAUSE_CTRL 0x110 23*4882a593Smuzhiyun #define RVE_SWLTB5_DECODED_NUM 0x114 24*4882a593Smuzhiyun #define RVE_SWLTB6_SKIP_NUM 0x118 25*4882a593Smuzhiyun #define RVE_SWLTB7_TOTAL_NUM 0x11c 26*4882a593Smuzhiyun #define RVE_SWLTB8_LAST_FRAME_BASE 0x120 27*4882a593Smuzhiyun #define RVE_SWLTB9_LAST_IDX 0x124 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* op reg */ 30*4882a593Smuzhiyun #define RVE_SWCFG0_EN 0x200 31*4882a593Smuzhiyun #define RVE_SWCFG4_OPERATOR 0x210 32*4882a593Smuzhiyun #define RVE_SWCFG5_CTRL 0x214 33*4882a593Smuzhiyun #define RVE_SWCFG6_TIMEOUT_THRESH 0x218 34*4882a593Smuzhiyun #define RVE_SWCFG7_DDR_CTRL 0x21c 35*4882a593Smuzhiyun #define RVE_SWCFG9_PIC_INFO 0x224 36*4882a593Smuzhiyun #define RVE_SWCFG10_HOR_STRIDE0 0x228 37*4882a593Smuzhiyun #define RVE_SWCFG11_HOR_STRIDE1 0x22c 38*4882a593Smuzhiyun #define RVE_SWCFG12_SRC0_BASE 0x230 39*4882a593Smuzhiyun #define RVE_SWCFG13_SRC1_BASE 0x234 40*4882a593Smuzhiyun #define RVE_SWCFG14_SRC2_BASE 0x238 41*4882a593Smuzhiyun #define RVE_SWCFG15_SRC3_BASE 0x23c 42*4882a593Smuzhiyun #define RVE_SWCFG16_DST0_BASE 0x240 43*4882a593Smuzhiyun #define RVE_SWCFG17_DST1_BASE 0x244 44*4882a593Smuzhiyun #define RVE_SWCFG18_DST2_BASE 0x248 45*4882a593Smuzhiyun #define RVE_SWCFG20_OP_CTRL0 0x250 46*4882a593Smuzhiyun #define RVE_SWCFG21_OP_CTRL1 0x254 47*4882a593Smuzhiyun #define RVE_SWCFG22_OP_CTRL2 0x258 48*4882a593Smuzhiyun #define RVE_SWCFG23_OP_CTRL3 0x25c 49*4882a593Smuzhiyun #define RVE_SWCFG24_OP_CTRL4 0x260 50*4882a593Smuzhiyun #define RVE_SWCFG25_OP_CTRL5 0x264 51*4882a593Smuzhiyun #define RVE_SWCFG26_OP_CTRL6 0x268 52*4882a593Smuzhiyun #define RVE_SWCFG27_OP_CTRL7 0x26c 53*4882a593Smuzhiyun #define RVE_SWCFG28_OP_CTRL8 0x270 54*4882a593Smuzhiyun #define RVE_SWCFG29_OP_CTRL9 0x274 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun /* monitor reg */ 57*4882a593Smuzhiyun #define RVE_SWCFG32_MONITOR_CTRL0 0x280 58*4882a593Smuzhiyun #define RVE_SWCFG33_MONITOR_CTRL1 0x284 59*4882a593Smuzhiyun #define RVE_SWCFG34_MONITOR_INFO0 0x288 60*4882a593Smuzhiyun #define RVE_SWCFG35_MONITOR_INFO1 0x28c 61*4882a593Smuzhiyun #define RVE_SWCFG36_MONITOR_INFO2 0x290 62*4882a593Smuzhiyun #define RVE_SWCFG37_MONITOR_INFO3 0x294 63*4882a593Smuzhiyun #define RVE_SWCFG38_MONITOR_INFO4 0x298 64*4882a593Smuzhiyun #define RVE_SWCFG39_MONITOR_INFO5 0x29c 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* mmu reg */ 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* common reg */ 69*4882a593Smuzhiyun #define RVE_SYS_REG 0x000 70*4882a593Smuzhiyun #define RVE_LTB_REG 0x100 71*4882a593Smuzhiyun #define RVE_CFG_REG 0x200 72*4882a593Smuzhiyun #define RVE_MMU_REG 0x300 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* mode value */ 75*4882a593Smuzhiyun #define RVE_LLP_MODE 0x8000 76*4882a593Smuzhiyun #define RVE_LLP_DONE 0x11 77*4882a593Smuzhiyun #define RVE_CLEAR_UP_REG6_WROK_STA 0xff0000 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun void rve_soft_reset(struct rve_scheduler_t *scheduler); 80*4882a593Smuzhiyun int rve_set_reg(struct rve_job *job, struct rve_scheduler_t *scheduler); 81*4882a593Smuzhiyun int rve_init_reg(struct rve_job *job); 82*4882a593Smuzhiyun int rve_get_version(struct rve_scheduler_t *scheduler); 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun void rve_dump_read_back_reg(struct rve_scheduler_t *scheduler); 85*4882a593Smuzhiyun void rve_get_monitor_info(struct rve_job *job); 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #endif 88*4882a593Smuzhiyun 89