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/OK3568_Linux_fs/kernel/drivers/staging/wlan-ng/
H A Dp80211metadef.h56 P80211DID_MKITEM(1) | 0x00000000)
60 P80211DID_MKITEM(2) | 0x00000000)
67 P80211DID_MKITEM(1) | 0x00000000)
71 P80211DID_MKITEM(2) | 0x00000000)
108 P80211DID_MKITEM(1) | 0x00000000)
112 P80211DID_MKITEM(2) | 0x00000000)
119 P80211DID_MKITEM(1) | 0x00000000)
123 P80211DID_MKITEM(2) | 0x00000000)
127 P80211DID_MKITEM(3) | 0x00000000)
134 P80211DID_MKITEM(1) | 0x00000000)
[all …]
/OK3568_Linux_fs/u-boot/board/sr1500/qts/
H A Diocsr_config.h16 0x00100000,
17 0x40000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x000E0180,
23 0x18060000,
24 0x18000000,
25 0x00018060,
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drtd1195.dtsi6 /memreserve/ 0x00000000 0x0000a800; /* boot code */
7 /memreserve/ 0x0000a800 0x000f5800;
8 /memreserve/ 0x17fff000 0x00001000;
21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0x0>;
33 reg = <0x1>;
44 reg = <0x0000b000 0x1000>;
48 reg = <0x01b00000 0x400000>;
52 reg = <0x01ffe000 0x4000>;
[all …]
H A Ds3c6410-smdk6410.dts24 reg = <0x50000000 0x8000000>;
31 fin_pll: oscillator-0 {
35 #clock-cells = <0>;
42 #clock-cells = <0>;
49 reg = <0x18000000 0x8000000>;
54 reg = <0x18000000 0x10000>;
70 pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>;
77 pinctrl-0 = <&uart0_data>, <&uart0_fctl>;
83 pinctrl-0 = <&uart1_data>;
89 pinctrl-0 = <&uart2_data>;
[all …]
H A Dvexpress-v2p-ca5s.dts16 arm,hbi = <0x225>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
55 reg = <0x80000000 0x40000000>;
63 /* Chipselect 2 is physically at 0x18000000 */
67 reg = <0x18000000 0x00800000>;
74 reg = <0x2a110000 0x1000>;
75 interrupts = <0 85 4>;
[all …]
H A Dvexpress-v2p-ca15-tc1.dts16 arm,hbi = <0x237>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
53 reg = <0 0x80000000 0 0x40000000>;
61 /* Chipselect 2 is physically at 0x18000000 */
65 reg = <0 0x18000000 0 0x00800000>;
72 reg = <0 0x2b000000 0 0x1000>;
73 interrupts = <0 85 4>;
[all …]
H A Dbcm53573.dtsi26 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x0>;
37 ranges = <0x00000000 0x18310000 0x00008000>;
44 #address-cells = <0>;
46 reg = <0x1000 0x1000>,
47 <0x2000 0x0100>;
65 #clock-cells = <0>;
73 reg = <0x18000000 0x1000>;
74 ranges = <0x00000000 0x18000000 0x00100000>;
[all …]
H A Ds3c6410-mini6410.dts24 reg = <0x50000000 0x10000000>;
31 fin_pll: oscillator-0 {
35 #clock-cells = <0>;
42 #clock-cells = <0>;
49 reg = <0x18000000 0x8000000>;
54 reg = <0x18000000 0x2 0x18000004 0x2>;
64 pinctrl-0 = <&gpio_keys>;
69 gpios = <&gpn 0 GPIO_ACTIVE_LOW>;
127 pinctrl-0 = <&gpio_leds>;
154 pwms = <&pwm 0 1000000 0>;
[all …]
/OK3568_Linux_fs/u-boot/arch/mips/include/asm/
H A Dmalta.h11 #define MALTA_GT_BASE 0x1be00000
12 #define MALTA_GT_PCIIO_BASE 0x18000000
13 #define MALTA_GT_UART0_BASE (MALTA_GT_PCIIO_BASE + 0x3f8)
15 #define MALTA_MSC01_BIU_BASE 0x1bc80000
16 #define MALTA_MSC01_PCI_BASE 0x1bd00000
17 #define MALTA_MSC01_PBC_BASE 0x1bd40000
18 #define MALTA_MSC01_IP1_BASE 0x1bc00000
19 #define MALTA_MSC01_IP1_SIZE 0x00400000
20 #define MALTA_MSC01_IP2_BASE1 0x10000000
21 #define MALTA_MSC01_IP2_SIZE1 0x08000000
[all …]
/OK3568_Linux_fs/u-boot/board/aries/mcvevk/qts/
H A Diocsr_config.h16 0x00000000,
17 0x00000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x00000000,
23 0x18060000,
24 0x00000060,
25 0x00000000,
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/bus/
H A Dbrcm,bus-axi.txt26 reg = <0x18000000 0x1000>;
27 ranges = <0x00000000 0x18000000 0x00100000>;
31 interrupt-map-mask = <0x000fffff 0xffff>;
33 /* Ethernet Controller 0 */
34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
39 /* PCIe Controller 0 */
40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/OK3568_Linux_fs/kernel/arch/sh/include/mach-common/mach/
H A Dsh7785lcr.h11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/arm/
H A Drtsm_ve-aemv8a.dts15 /memreserve/ 0x80000000 0x00010000;
37 #size-cells = <0>;
39 cpu@0 {
42 reg = <0x0 0x0>;
44 cpu-release-addr = <0x0 0x8000fff8>;
50 reg = <0x0 0x1>;
52 cpu-release-addr = <0x0 0x8000fff8>;
58 reg = <0x0 0x2>;
60 cpu-release-addr = <0x0 0x8000fff8>;
66 reg = <0x0 0x3>;
[all …]
H A Dvexpress-v2f-1xv7-ca53x2.dts20 arm,hbi = <0x247>;
21 arm,vexpress,site = <0xf>;
42 #size-cells = <0>;
44 cpu@0 {
47 reg = <0 0>;
54 reg = <0 1>;
65 reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
73 /* Chipselect 2 is physically at 0x18000000 */
77 reg = <0 0x18000000 0 0x00800000>;
85 #address-cells = <0>;
[all …]
H A Dfvp-base-revc.dts15 /memreserve/ 0x80000000 0x00010000;
43 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0 0x000>;
54 reg = <0x0 0x100>;
60 reg = <0x0 0x200>;
66 reg = <0x0 0x300>;
72 reg = <0x0 0x10000>;
78 reg = <0x0 0x10100>;
84 reg = <0x0 0x10200>;
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Del6x_common.h31 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
46 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
51 #define CONFIG_SF_DEFAULT_CS 0
66 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
67 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
68 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
69 "console=" CONSOLE_DEV "\0" \
70 "fdtfile=undefined\0" \
71 "fdt_high=0xffffffff\0" \
72 "fdt_addr_r=0x18000000\0" \
[all …]
H A Dmx6cuboxi.h28 #define CONFIG_DWC_AHSATA_PORT_ID 0
39 #define CONFIG_FEC_MXC_PHYADDR 0
57 #define CONFIG_MXC_USB_FLAGS 0
76 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */
81 "fdtfile=undefined\0" \
82 "fdt_addr_r=0x18000000\0" \
83 "fdt_addr=0x18000000\0" \
84 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
85 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
86 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
[all …]
H A Dwandboard.h30 #define CONFIG_DWC_AHSATA_PORT_ID 0
36 #define CONFIG_SYS_MEMTEST_START 0x10000000
49 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
54 #define CONFIG_MXC_USB_FLAGS 0
81 "console=ttymxc0,115200\0" \
82 "splashpos=m,m\0" \
83 "fdtfile=undefined\0" \
84 "fdt_high=0xffffffff\0" \
85 "initrd_high=0xffffffff\0" \
86 "fdt_addr_r=0x18000000\0" \
[all …]
H A Dimx6_logic.h24 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
32 #define CONFIG_FEC_MXC_PHYADDR 0
38 "script=boot.scr\0" \
39 "image=zImage\0" \
40 "bootm_size=0x10000000\0" \
41 "fdt_addr_r=0x18000000\0" \
42 "fdt_addr=0x18000000\0" \
43 "ramdisk_addr_r=0x13000000\0" \
44 "ramdiskaddr=0x13000000\0" \
45 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpu/
H A Dnvidia,gk20a.txt46 reg = <0x0 0x57000000 0x0 0x01000000>,
47 <0x0 0x58000000 0x0 0x01000000>;
64 reg = <0x0 0x57000000 0x0 0x01000000>,
65 <0x0 0x58000000 0x0 0x01000000>;
82 reg = <0x0 0x17000000 0x0 0x1000000>,
83 <0x0 0x18000000 0x0 0x1000000>;
100 reg = <0x17000000 0x10000000>,
101 <0x18000000 0x10000000>;
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/
H A Ddhd_macdbg.c55 {0x20000, 256}, in dhd_macdbg_attach()
56 {0x21e10, 16}, in dhd_macdbg_attach()
57 {0x20300, 16}, in dhd_macdbg_attach()
58 {0x20700, 16}, in dhd_macdbg_attach()
59 {0x20b00, 16}, in dhd_macdbg_attach()
60 {0x20be0, 16}, in dhd_macdbg_attach()
61 {0x20bff, 16}, in dhd_macdbg_attach()
62 {0xc000, 32}, in dhd_macdbg_attach()
63 {0xe000, 32}, in dhd_macdbg_attach()
64 {0x10000, 0x8000}, in dhd_macdbg_attach()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-rpc/
H A DMakefile.boot2 zreladdr-y += 0x10008000
3 params_phys-y := 0x10000100
4 initrd_phys-y := 0x18000000
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-j7200.dtsi39 #size-cells = <0>;
53 cpu0: cpu@0 {
55 reg = <0x000>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
69 reg = <0x001>;
72 i-cache-size = <0xc000>;
75 d-cache-size = <0x8000>;
85 cache-size = <0x100000>;
125 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
/OK3568_Linux_fs/u-boot/board/cadence/xtfpga/
H A DKconfig33 default 0x04000000 if XTFPGA_LX60
34 default 0x03000000 if XTFPGA_LX110
35 default 0x06000000 if XTFPGA_LX200
36 default 0x18000000 if XTFPGA_ML605
37 default 0x38000000 if XTFPGA_KC705
/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/brcm80211/include/
H A Dsoc.h9 #define SI_ENUM_BASE 0x18000000 /* Enumeration space base */
12 #define SICF_BIST_EN 0x8000
13 #define SICF_PME_EN 0x4000
14 #define SICF_CORE_BITS 0x3ffc
15 #define SICF_FGC 0x0002
16 #define SICF_CLOCK_EN 0x0001
19 #define SISF_BIST_DONE 0x8000
20 #define SISF_BIST_ERROR 0x4000
21 #define SISF_GATED_CLK 0x2000
22 #define SISF_DMA64 0x1000
[all …]

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