1*4882a593Smuzhiyunif TARGET_XTFPGA 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunchoice 4*4882a593Smuzhiyun prompt "XTFPGA board type select" 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunconfig XTFPGA_LX60 7*4882a593Smuzhiyun bool "Support Avnet LX60" 8*4882a593Smuzhiyunconfig XTFPGA_LX110 9*4882a593Smuzhiyun bool "Support Avnet LX110" 10*4882a593Smuzhiyunconfig XTFPGA_LX200 11*4882a593Smuzhiyun bool "Support Avnet LX200" 12*4882a593Smuzhiyunconfig XTFPGA_ML605 13*4882a593Smuzhiyun bool "Support Xilinx ML605" 14*4882a593Smuzhiyunconfig XTFPGA_KC705 15*4882a593Smuzhiyun bool "Support Xilinx KC705" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyunendchoice 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunconfig SYS_BOARD 20*4882a593Smuzhiyun string 21*4882a593Smuzhiyun default "xtfpga" 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunconfig SYS_VENDOR 24*4882a593Smuzhiyun string 25*4882a593Smuzhiyun default "cadence" 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunconfig SYS_CONFIG_NAME 28*4882a593Smuzhiyun string 29*4882a593Smuzhiyun default "xtfpga" 30*4882a593Smuzhiyun 31*4882a593Smuzhiyunconfig BOARD_SDRAM_SIZE 32*4882a593Smuzhiyun hex 33*4882a593Smuzhiyun default 0x04000000 if XTFPGA_LX60 34*4882a593Smuzhiyun default 0x03000000 if XTFPGA_LX110 35*4882a593Smuzhiyun default 0x06000000 if XTFPGA_LX200 36*4882a593Smuzhiyun default 0x18000000 if XTFPGA_ML605 37*4882a593Smuzhiyun default 0x38000000 if XTFPGA_KC705 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunendif 40