xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/bcm53573.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
7*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
8*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
9*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/arm-gic.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	#address-cells = <1>;
13*4882a593Smuzhiyun	#size-cells = <1>;
14*4882a593Smuzhiyun	interrupt-parent = <&gic>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		serial0 = &uart0;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	chosen {
21*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	cpus {
25*4882a593Smuzhiyun		#address-cells = <1>;
26*4882a593Smuzhiyun		#size-cells = <0>;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		cpu@0 {
29*4882a593Smuzhiyun			device_type = "cpu";
30*4882a593Smuzhiyun			compatible = "arm,cortex-a7";
31*4882a593Smuzhiyun			reg = <0x0>;
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	mpcore@18310000 {
36*4882a593Smuzhiyun		compatible = "simple-bus";
37*4882a593Smuzhiyun		ranges = <0x00000000 0x18310000 0x00008000>;
38*4882a593Smuzhiyun		#address-cells = <1>;
39*4882a593Smuzhiyun		#size-cells = <1>;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		gic: interrupt-controller@1000 {
42*4882a593Smuzhiyun			compatible = "arm,cortex-a7-gic";
43*4882a593Smuzhiyun			#interrupt-cells = <3>;
44*4882a593Smuzhiyun			#address-cells = <0>;
45*4882a593Smuzhiyun			interrupt-controller;
46*4882a593Smuzhiyun			reg = <0x1000 0x1000>,
47*4882a593Smuzhiyun			      <0x2000 0x0100>;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	timer {
52*4882a593Smuzhiyun		compatible = "arm,armv7-timer";
53*4882a593Smuzhiyun		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
54*4882a593Smuzhiyun			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
55*4882a593Smuzhiyun			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
56*4882a593Smuzhiyun			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	clocks {
60*4882a593Smuzhiyun		#address-cells = <1>;
61*4882a593Smuzhiyun		#size-cells = <1>;
62*4882a593Smuzhiyun		ranges;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		alp: oscillator {
65*4882a593Smuzhiyun			#clock-cells = <0>;
66*4882a593Smuzhiyun			compatible = "fixed-clock";
67*4882a593Smuzhiyun			clock-frequency = <40000000>;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	axi@18000000 {
72*4882a593Smuzhiyun		compatible = "brcm,bus-axi";
73*4882a593Smuzhiyun		reg = <0x18000000 0x1000>;
74*4882a593Smuzhiyun		ranges = <0x00000000 0x18000000 0x00100000>;
75*4882a593Smuzhiyun		#address-cells = <1>;
76*4882a593Smuzhiyun		#size-cells = <1>;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		#interrupt-cells = <1>;
79*4882a593Smuzhiyun		interrupt-map-mask = <0x000fffff 0xffff>;
80*4882a593Smuzhiyun		interrupt-map =
81*4882a593Smuzhiyun			/* ChipCommon */
82*4882a593Smuzhiyun			<0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun			/* IEEE 802.11 0 */
85*4882a593Smuzhiyun			<0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun			/* PCIe Controller 0 */
88*4882a593Smuzhiyun			<0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
89*4882a593Smuzhiyun			<0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
90*4882a593Smuzhiyun			<0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
91*4882a593Smuzhiyun			<0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
92*4882a593Smuzhiyun			<0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
93*4882a593Smuzhiyun			<0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun			/* USB 2.0 Controller */
96*4882a593Smuzhiyun			<0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun			/* Ethernet Controller 0 */
99*4882a593Smuzhiyun			<0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun			/* IEEE 802.11 1 */
102*4882a593Smuzhiyun			<0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun			/* Ethernet Controller 1 */
105*4882a593Smuzhiyun			<0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun		chipcommon: chipcommon@0 {
108*4882a593Smuzhiyun			compatible = "simple-bus";
109*4882a593Smuzhiyun			reg = <0x00000000 0x1000>;
110*4882a593Smuzhiyun			ranges;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun			#address-cells = <1>;
113*4882a593Smuzhiyun			#size-cells = <1>;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun			gpio-controller;
116*4882a593Smuzhiyun			#gpio-cells = <2>;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun			uart0: serial@300 {
119*4882a593Smuzhiyun				compatible = "ns16550a";
120*4882a593Smuzhiyun				reg = <0x0300 0x100>;
121*4882a593Smuzhiyun				interrupt-parent = <&gic>;
122*4882a593Smuzhiyun				interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
123*4882a593Smuzhiyun				clocks = <&alp>;
124*4882a593Smuzhiyun				status = "okay";
125*4882a593Smuzhiyun			};
126*4882a593Smuzhiyun		};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		pcie0: pcie@2000 {
129*4882a593Smuzhiyun			reg = <0x00002000 0x1000>;
130*4882a593Smuzhiyun		};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun		usb2: usb2@4000 {
133*4882a593Smuzhiyun			reg = <0x4000 0x1000>;
134*4882a593Smuzhiyun			ranges;
135*4882a593Smuzhiyun			#address-cells = <1>;
136*4882a593Smuzhiyun			#size-cells = <1>;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun			ehci: ehci@4000 {
139*4882a593Smuzhiyun				compatible = "generic-ehci";
140*4882a593Smuzhiyun				reg = <0x4000 0x1000>;
141*4882a593Smuzhiyun				interrupt-parent = <&gic>;
142*4882a593Smuzhiyun				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun				#address-cells = <1>;
145*4882a593Smuzhiyun				#size-cells = <0>;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun				ehci_port1: port@1 {
148*4882a593Smuzhiyun					reg = <1>;
149*4882a593Smuzhiyun					#trigger-source-cells = <0>;
150*4882a593Smuzhiyun				};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun				ehci_port2: port@2 {
153*4882a593Smuzhiyun					reg = <2>;
154*4882a593Smuzhiyun					#trigger-source-cells = <0>;
155*4882a593Smuzhiyun				};
156*4882a593Smuzhiyun			};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun			ohci: ohci@d000 {
159*4882a593Smuzhiyun				#usb-cells = <0>;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun				compatible = "generic-ohci";
162*4882a593Smuzhiyun				reg = <0xd000 0x1000>;
163*4882a593Smuzhiyun				interrupt-parent = <&gic>;
164*4882a593Smuzhiyun				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun				#address-cells = <1>;
167*4882a593Smuzhiyun				#size-cells = <0>;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun				ohci_port1: port@1 {
170*4882a593Smuzhiyun					reg = <1>;
171*4882a593Smuzhiyun					#trigger-source-cells = <0>;
172*4882a593Smuzhiyun				};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun				ohci_port2: port@2 {
175*4882a593Smuzhiyun					reg = <2>;
176*4882a593Smuzhiyun					#trigger-source-cells = <0>;
177*4882a593Smuzhiyun				};
178*4882a593Smuzhiyun			};
179*4882a593Smuzhiyun		};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun		gmac0: ethernet@5000 {
182*4882a593Smuzhiyun			reg = <0x5000 0x1000>;
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun		gmac1: ethernet@b000 {
186*4882a593Smuzhiyun			reg = <0xb000 0x1000>;
187*4882a593Smuzhiyun		};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun		pmu@12000 {
190*4882a593Smuzhiyun			compatible = "simple-mfd", "syscon";
191*4882a593Smuzhiyun			reg = <0x00012000 0x00001000>;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun			ilp: ilp {
194*4882a593Smuzhiyun				compatible = "brcm,bcm53573-ilp";
195*4882a593Smuzhiyun				clocks = <&alp>;
196*4882a593Smuzhiyun				#clock-cells = <0>;
197*4882a593Smuzhiyun				clock-output-names = "ilp";
198*4882a593Smuzhiyun			};
199*4882a593Smuzhiyun		};
200*4882a593Smuzhiyun	};
201*4882a593Smuzhiyun};
202