1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (C) Stefano Babic <sbabic@denx.de> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Configuration settings for the E+L i.MX6Q DO82 board. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __EL6Q_COMMON_CONFIG_H 10*4882a593Smuzhiyun #define __EL6Q_COMMON_CONFIG_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define CONFIG_BOARD_NAME EL6Q 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include <config_distro_defaults.h> 15*4882a593Smuzhiyun #include "mx6_common.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define CONFIG_IMX_THERMAL 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Size of malloc() pool */ 20*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define CONFIG_MXC_UART 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #ifdef CONFIG_SPL 25*4882a593Smuzhiyun #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 26*4882a593Smuzhiyun #define CONFIG_SPL_SPI_LOAD 27*4882a593Smuzhiyun #include "imx6_spl.h" 28*4882a593Smuzhiyun #endif 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* MMC Configs */ 31*4882a593Smuzhiyun #define CONFIG_SYS_FSL_ESDHC_ADDR 0 32*4882a593Smuzhiyun #define CONFIG_SYS_FSL_USDHC_NUM 2 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* I2C config */ 35*4882a593Smuzhiyun #define CONFIG_SYS_I2C 36*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC 37*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 38*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 39*4882a593Smuzhiyun #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 40*4882a593Smuzhiyun #define CONFIG_SYS_I2C_SPEED 100000 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* PMIC */ 43*4882a593Smuzhiyun #define CONFIG_POWER 44*4882a593Smuzhiyun #define CONFIG_POWER_I2C 45*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100 46*4882a593Smuzhiyun #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Commands */ 49*4882a593Smuzhiyun #define CONFIG_MXC_SPI 50*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_BUS 3 51*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_CS 0 52*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_SPEED 20000000 53*4882a593Smuzhiyun #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* allow to overwrite serial and ethaddr */ 56*4882a593Smuzhiyun #define CONFIG_ENV_OVERWRITE 57*4882a593Smuzhiyun #define CONFIG_MXC_UART_BASE UART2_BASE 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun /* Command definition */ 60*4882a593Smuzhiyun #undef CONFIG_CMD_IMLS 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun #define CONFIG_BOARD_NAME EL6Q 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 65*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 66*4882a593Smuzhiyun "board="__stringify(CONFIG_BOARD_NAME)"\0" \ 67*4882a593Smuzhiyun "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \ 68*4882a593Smuzhiyun "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \ 69*4882a593Smuzhiyun "console=" CONSOLE_DEV "\0" \ 70*4882a593Smuzhiyun "fdtfile=undefined\0" \ 71*4882a593Smuzhiyun "fdt_high=0xffffffff\0" \ 72*4882a593Smuzhiyun "fdt_addr_r=0x18000000\0" \ 73*4882a593Smuzhiyun "fdt_addr=0x18000000\0" \ 74*4882a593Smuzhiyun "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \ 75*4882a593Smuzhiyun "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 76*4882a593Smuzhiyun "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 77*4882a593Smuzhiyun "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 78*4882a593Smuzhiyun BOOTENV 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define BOOT_TARGET_DEVICES(func) \ 81*4882a593Smuzhiyun func(MMC, mmc, 0) \ 82*4882a593Smuzhiyun func(MMC, mmc, 1) \ 83*4882a593Smuzhiyun func(PXE, PXE, na) \ 84*4882a593Smuzhiyun func(DHCP, dhcp, na) 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND \ 87*4882a593Smuzhiyun "run findfdt; " \ 88*4882a593Smuzhiyun "run distro_bootcmd" 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #include <config_distro_bootcmd.h> 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define CONFIG_ARP_TIMEOUT 200UL 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define CONFIG_CMD_MEMTEST 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x10000000 97*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x10800000 98*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun /* Physical Memory Map */ 101*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 102*4882a593Smuzhiyun #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 105*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 106*4882a593Smuzhiyun #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_OFFSET \ 109*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 110*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 111*4882a593Smuzhiyun (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun /* environment organization */ 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun #define CONFIG_ENV_SIZE (8 * 1024) 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun #if defined(CONFIG_ENV_IS_IN_MMC) 118*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_DEV 1 119*4882a593Smuzhiyun #define CONFIG_SYS_MMC_ENV_PART 2 120*4882a593Smuzhiyun #define CONFIG_ENV_OFFSET 0x0 121*4882a593Smuzhiyun #endif 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun #endif /* __EL6Q_COMMON_CONFIG_H */ 124