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Searched defs:clk (Results 51 – 75 of 244) sorted by relevance

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/rk3399_rockchip-uboot/board/sbc8349/
H A Dpci.c53 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; in pci_init_board() local
/rk3399_rockchip-uboot/drivers/clk/exynos/
H A Dclk-exynos7420.c70 static ulong exynos7420_topc_get_rate(struct clk *clk) in exynos7420_topc_get_rate()
125 static ulong exynos7420_top0_get_rate(struct clk *clk) in exynos7420_top0_get_rate()
173 static ulong exynos7420_peric1_get_rate(struct clk *clk) in exynos7420_peric1_get_rate()
/rk3399_rockchip-uboot/drivers/clk/at91/
H A Dclk-generated.c49 static ulong generic_clk_get_rate(struct clk *clk) in generic_clk_get_rate()
76 static ulong generic_clk_set_rate(struct clk *clk, ulong rate) in generic_clk_set_rate()
H A Dclk-h32mx.c20 static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk) in sama5d4_h32mx_clk_get_rate()
H A Dclk-system.c47 static int system_clk_enable(struct clk *clk) in system_clk_enable()
/rk3399_rockchip-uboot/board/tqc/tqm834x/
H A Dpci.c56 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; in pci_init_board() local
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_px30.c1165 static ulong px30_mac_set_clk(struct clk *clk, uint hz) in px30_mac_set_clk()
1192 static int px30_mac_set_speed_clk(struct clk *clk, uint hz) in px30_mac_set_speed_clk()
1290 static ulong px30_clk_get_rate(struct clk *clk) in px30_clk_get_rate()
1384 static ulong px30_clk_set_rate(struct clk *clk, ulong rate) in px30_clk_set_rate()
1490 int rockchip_mmc_get_phase(struct clk *clk) in rockchip_mmc_get_phase()
1524 int rockchip_mmc_set_phase(struct clk *clk, u32 degrees) in rockchip_mmc_set_phase()
1567 static int px30_clk_get_phase(struct clk *clk) in px30_clk_get_phase()
1584 static int px30_clk_set_phase(struct clk *clk, int degrees) in px30_clk_set_phase()
1602 static int px30_gmac_set_parent(struct clk *clk, struct clk *parent) in px30_gmac_set_parent()
1619 static int px30_clk_set_parent(struct clk *clk, struct clk *parent) in px30_clk_set_parent()
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H A Dclk_rk3288.c1078 static ulong rk3288_clk_get_rate(struct clk *clk) in rk3288_clk_get_rate()
1151 static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate) in rk3288_clk_set_rate()
1256 int rockchip_mmc_get_phase(struct clk *clk) in rockchip_mmc_get_phase()
1289 int rockchip_mmc_set_phase(struct clk *clk, u32 degrees) in rockchip_mmc_set_phase()
1331 static int rk3288_clk_get_phase(struct clk *clk) in rk3288_clk_get_phase()
1347 static int rk3288_clk_set_phase(struct clk *clk, int degrees) in rk3288_clk_set_phase()
1363 static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *parent) in rk3288_gmac_set_parent()
1401 static int __maybe_unused rk3288_vop_set_parent(struct clk *clk, in rk3288_vop_set_parent()
1439 static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *parent) in rk3288_clk_set_parent()
1598 struct clk clk; in soc_clk_dump() local
H A Dclk_rk3562.c1353 static ulong rk3562_clk_get_rate(struct clk *clk) in rk3562_clk_get_rate()
1477 static ulong rk3562_clk_set_rate(struct clk *clk, ulong rate) in rk3562_clk_set_rate()
1609 int rk3562_mmc_get_phase(struct clk *clk) in rk3562_mmc_get_phase()
1644 int rk3562_mmc_set_phase(struct clk *clk, u32 degrees) in rk3562_mmc_set_phase()
1685 static int rk3562_clk_get_phase(struct clk *clk) in rk3562_clk_get_phase()
1701 static int rk3562_clk_set_phase(struct clk *clk, int degrees) in rk3562_clk_set_phase()
1736 struct clk clk; in soc_clk_dump() local
2001 static ulong rk3562_clk_scmi_get_rate(struct clk *clk) in rk3562_clk_scmi_get_rate()
2014 static ulong rk3562_clk_scmi_set_rate(struct clk *clk, ulong rate) in rk3562_clk_scmi_set_rate()
/rk3399_rockchip-uboot/board/esd/vme8349/
H A Dpci.c57 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; in pci_init_board() local
/rk3399_rockchip-uboot/board/freescale/mpc8349itx/
H A Dpci.c65 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; in pci_init_board() local
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Dcpu.c15 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE; variable
/rk3399_rockchip-uboot/board/timll/devkit3250/
H A Ddevkit3250.c20 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE; variable
/rk3399_rockchip-uboot/drivers/clk/
H A Dclk_fixed_rate.c17 static ulong clk_fixed_rate_get_rate(struct clk *clk) in clk_fixed_rate_get_rate()
H A Dclk_stm32f7.c174 static unsigned long stm32_clk_get_rate(struct clk *clk) in stm32_clk_get_rate()
233 static int stm32_clk_enable(struct clk *clk) in stm32_clk_enable()
284 static int stm32_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) in stm32_clk_of_xlate()
/rk3399_rockchip-uboot/drivers/clk/aspeed/
H A Dclk_ast2500.c116 static ulong ast2500_clk_get_rate(struct clk *clk) in ast2500_clk_get_rate()
377 static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate) in ast2500_clk_set_rate()
397 static int ast2500_clk_enable(struct clk *clk) in ast2500_clk_enable()
/rk3399_rockchip-uboot/board/freescale/mpc837xerdb/
H A Dpci.c67 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; in pci_init_board() local
/rk3399_rockchip-uboot/board/work-microwave/work_92105/
H A Dwork_92105.c23 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE; variable
/rk3399_rockchip-uboot/drivers/serial/
H A Dserial_pic32.c49 static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate) in pic32_serial_init()
138 struct clk clk; in pic32_uart_probe() local
H A Dserial_sh.h744 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) argument
753 #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) argument
756 static inline int scbrr_calc(struct uart_port *port, int bps, int clk) in scbrr_calc()
763 #define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk) argument
765 #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) argument
768 #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */ argument
770 #define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */ argument
772 #define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */ argument
775 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) argument
779 #define DL_VALUE(bps, clk) 0 argument
/rk3399_rockchip-uboot/drivers/ufs/
H A Dti-j721e-ufs.c22 struct clk clk; in ti_j721e_ufs_probe() local
/rk3399_rockchip-uboot/drivers/mmc/
H A Dsh_mmcif.h200 #define MMC_CLK_DIV_MIN(clk) (clk / (1 << 9)) argument
201 #define MMC_CLK_DIV_MAX(clk) (clk / (1 << 1)) argument
203 #define MMC_CLK_DIV_MIN(clk) (clk / (1 << 8)) argument
204 #define MMC_CLK_DIV_MAX(clk) CLKDEV_EMMC_DATA argument
214 unsigned int clk; member
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Ddram_sun4i.c238 static void mctl_setup_dram_clock(u32 clk, u32 mbus_clk) in mctl_setup_dram_clock()
430 static void dramc_set_autorefresh_cycle(u32 clk, u32 density) in dramc_set_autorefresh_cycle()
442 static u32 ddr3_write_recovery(u32 clk) in ddr3_write_recovery()
/rk3399_rockchip-uboot/include/dm/platform_data/
H A Dserial_sh.h33 unsigned int clk; member
/rk3399_rockchip-uboot/board/samsung/trats/
H A Dtrats.c58 struct exynos4_clock *clk = in trats_low_power_mode() local
317 struct exynos4_clock *clk = in board_clock_init() local

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