xref: /rk3399_rockchip-uboot/drivers/ufs/ti-j721e-ufs.c (revision 8f7de5145da2de88e169e58343cceeee233362d4)
1*8f7de514SShawn Lin // SPDX-License-Identifier: GPL-2.0+
2*8f7de514SShawn Lin /*
3*8f7de514SShawn Lin  * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4*8f7de514SShawn Lin  */
5*8f7de514SShawn Lin 
6*8f7de514SShawn Lin #include <asm/io.h>
7*8f7de514SShawn Lin #include <clk.h>
8*8f7de514SShawn Lin #include <common.h>
9*8f7de514SShawn Lin #include <dm.h>
10*8f7de514SShawn Lin //#include <dm/device_compat.h>
11*8f7de514SShawn Lin #include <linux/bitops.h>
12*8f7de514SShawn Lin #include <linux/err.h>
13*8f7de514SShawn Lin 
14*8f7de514SShawn Lin #define UFS_SS_CTRL             0x4
15*8f7de514SShawn Lin #define UFS_SS_RST_N_PCS        BIT(0)
16*8f7de514SShawn Lin #define UFS_SS_CLK_26MHZ        BIT(4)
17*8f7de514SShawn Lin 
ti_j721e_ufs_probe(struct udevice * dev)18*8f7de514SShawn Lin static int ti_j721e_ufs_probe(struct udevice *dev)
19*8f7de514SShawn Lin {
20*8f7de514SShawn Lin 	void __iomem *base;
21*8f7de514SShawn Lin 	unsigned int clock;
22*8f7de514SShawn Lin 	struct clk clk;
23*8f7de514SShawn Lin 	u32 reg = 0;
24*8f7de514SShawn Lin 	int ret;
25*8f7de514SShawn Lin 
26*8f7de514SShawn Lin 	ret = clk_get_by_index(dev, 0, &clk);
27*8f7de514SShawn Lin 	if (ret) {
28*8f7de514SShawn Lin 		dev_err(dev, "failed to get M-PHY clock\n");
29*8f7de514SShawn Lin 		return ret;
30*8f7de514SShawn Lin 	}
31*8f7de514SShawn Lin 
32*8f7de514SShawn Lin 	clock = clk_get_rate(&clk);
33*8f7de514SShawn Lin 	if (IS_ERR_VALUE(clock)) {
34*8f7de514SShawn Lin 		dev_err(dev, "failed to get rate\n");
35*8f7de514SShawn Lin 		return ret;
36*8f7de514SShawn Lin 	}
37*8f7de514SShawn Lin 
38*8f7de514SShawn Lin 	base = dev_remap_addr_index(dev, 0);
39*8f7de514SShawn Lin 
40*8f7de514SShawn Lin 	if (clock == 26000000)
41*8f7de514SShawn Lin 		reg |= UFS_SS_CLK_26MHZ;
42*8f7de514SShawn Lin 	/* Take UFS slave device out of reset */
43*8f7de514SShawn Lin 	reg |= UFS_SS_RST_N_PCS;
44*8f7de514SShawn Lin 	writel(reg, base + UFS_SS_CTRL);
45*8f7de514SShawn Lin 
46*8f7de514SShawn Lin 	return 0;
47*8f7de514SShawn Lin }
48*8f7de514SShawn Lin 
ti_j721e_ufs_remove(struct udevice * dev)49*8f7de514SShawn Lin static int ti_j721e_ufs_remove(struct udevice *dev)
50*8f7de514SShawn Lin {
51*8f7de514SShawn Lin 	void __iomem *base = dev_remap_addr_index(dev, 0);
52*8f7de514SShawn Lin 	u32 reg = readl(base + UFS_SS_CTRL);
53*8f7de514SShawn Lin 
54*8f7de514SShawn Lin 	reg &= ~UFS_SS_RST_N_PCS;
55*8f7de514SShawn Lin 	writel(reg, base + UFS_SS_CTRL);
56*8f7de514SShawn Lin 
57*8f7de514SShawn Lin 	return 0;
58*8f7de514SShawn Lin }
59*8f7de514SShawn Lin 
60*8f7de514SShawn Lin static const struct udevice_id ti_j721e_ufs_ids[] = {
61*8f7de514SShawn Lin 	{
62*8f7de514SShawn Lin 		.compatible = "ti,j721e-ufs",
63*8f7de514SShawn Lin 	},
64*8f7de514SShawn Lin 	{},
65*8f7de514SShawn Lin };
66*8f7de514SShawn Lin 
67*8f7de514SShawn Lin U_BOOT_DRIVER(ti_j721e_ufs) = {
68*8f7de514SShawn Lin 	.name			= "ti-j721e-ufs",
69*8f7de514SShawn Lin 	.id			= UCLASS_MISC,
70*8f7de514SShawn Lin 	.of_match		= ti_j721e_ufs_ids,
71*8f7de514SShawn Lin 	.probe			= ti_j721e_ufs_probe,
72*8f7de514SShawn Lin 	.remove			= ti_j721e_ufs_remove,
73*8f7de514SShawn Lin 	.flags			= DM_FLAG_OS_PREPARE,
74*8f7de514SShawn Lin };
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