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Searched refs:reg16 (Results 1 – 23 of 23) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c385 REG16_TSO* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
425 reg16 = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
429 reg16 = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
433 reg16 = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
437 reg16 = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
441 reg16 = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
445 reg16 = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
449 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
450 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c385 REG16_TSO* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
425 reg16 = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
429 reg16 = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
433 reg16 = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
437 reg16 = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
441 reg16 = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
445 reg16 = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
449 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
450 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c385 REG16_TSO* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
425 reg16 = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
429 reg16 = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
433 reg16 = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
437 reg16 = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
441 reg16 = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
445 reg16 = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
452 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
453 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c383 REG16_TSO* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
423 reg16 = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
427 reg16 = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
431 reg16 = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
435 reg16 = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
439 reg16 = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
443 reg16 = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
450 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
451 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c386 REG16_TSO* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
426 reg16 = &(_TSOCtrl->CHANNEL0_IF1_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
430 reg16 = &(_TSOCtrl->CHANNEL0_IF2_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
434 reg16 = &(_TSOCtrl->CHANNEL0_IF3_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
438 reg16 = &(_TSOCtrl->CHANNEL0_IF4_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
442 reg16 = &(_TSOCtrl->CHANNEL0_IF5_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
446 reg16 = &(_TSOCtrl->CHANNEL0_IF6_CONFIG2); in HAL_TSO_GetInputTSIF_Status()
453 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
454 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tso/
H A DhalTSO.c716 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
746 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
750 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
754 reg16 = &(_TSOCtrl->TSO_CH0_IF6_CFG2); in HAL_TSO_GetInputTSIF_Status()
760 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
761 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tso/
H A DhalTSO.c744 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
774 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
778 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
782 reg16 = &(_TSOCtrl->TSO_CH0_IF6_CFG2); in HAL_TSO_GetInputTSIF_Status()
788 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
789 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tso/
H A DhalTSO.c591 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
616 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
620 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
626 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
627 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tso/
H A DhalTSO.c787 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
822 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
826 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
830 reg16 = &(_TSOCtrl->TSO_CH0_IF6_CFG2); in HAL_TSO_GetInputTSIF_Status()
842 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
843 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tso/
H A DhalTSO.c808 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
843 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
847 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
851 reg16 = &(_TSOCtrl->TSO_CH0_IF6_CFG2); in HAL_TSO_GetInputTSIF_Status()
863 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
864 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tso/
H A DhalTSO.c808 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
843 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
847 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
851 reg16 = &(_TSOCtrl->TSO_CH0_IF6_CFG2); in HAL_TSO_GetInputTSIF_Status()
863 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
864 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tso/
H A DhalTSO.c787 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
822 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
826 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
830 reg16 = &(_TSOCtrl->TSO_CH0_IF6_CFG2); in HAL_TSO_GetInputTSIF_Status()
842 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
843 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tso/
H A DhalTSO.c669 REG16* reg16 = 0; in HAL_TSO_GetInputTSIF_Status() local
693 reg16 = &(_TSOCtrl->TSO_CH0_IF1_CFG2); in HAL_TSO_GetInputTSIF_Status()
697 reg16 = &(_TSOCtrl->TSO_CH0_IF5_CFG2); in HAL_TSO_GetInputTSIF_Status()
703 *pbExtSync = ((_HAL_REG16_R(reg16) & TSO_CHCFG_EXT_SYNC_SEL) == TSO_CHCFG_EXT_SYNC_SEL); in HAL_TSO_GetInputTSIF_Status()
704 *pbParl = ((_HAL_REG16_R(reg16) & TSO_CHCFG_P_SEL) == TSO_CHCFG_P_SEL); in HAL_TSO_GetInputTSIF_Status()
/utopia/UTPA2-700.0.x/modules/mfe/drv/mfe_ex/cModel/
H A Dmfe_reg_jpge.c_186 mfe_reg->reg16 = 0xffff; // clock gating
285 WriteRegMFE(0x16, mfe_reg->reg16, "[%d] reg16", nRegWriteCount++, "Clock gating");
H A Dmfe_reg.h379 MS_U16 reg16; member
1447 MS_U16 reg16; member
H A Dmfe_reg_m4ve.c635 mfe_reg->reg16 = 0xffff; // clock gating in OutputSwCfg1_Mp4()
952 …WriteRegMFE(0x16, mfe_reg->reg16, (MS_S8*)("[%d] reg16"), nRegWriteCount++, (MS_S8*)("Clock gating… in OutputSwCfg1_Mp4()
H A Dmfe_reg_264e.c638 mfe_reg->reg16 = 0xffff; // clock gating in OutputSwCfg1_H264()
1056 …WriteRegMFE(0x16, mfe_reg->reg16, (MS_S8*)("[%d] reg16"), nRegWriteCount++, (MS_S8*)("Clock gating… in OutputSwCfg1_H264()
H A Dmfe_common.c387 …WriteRegMFE(0x16, mfe_reg->reg16, (MS_S8*)("[%d] reg16"), nRegWriteCount++, (MS_S8*)("clock gating… in ResetAllRegs()
/utopia/UTPA2-700.0.x/modules/mfe/drv/mfe/cModel/
H A Dmfe_reg_jpge.c125 mfe_reg.reg16 = 0xffff; // clock gating in OutputSwCfg1_Jpg()
222 WriteRegMFE(0x16, mfe_reg.reg16, "[%d] reg16", nRegWriteCount++, "Clock gating"); in OutputSwCfg1_Jpg()
H A Dmfe_reg_264e.c364 mfe_reg.reg16 = 0xffff; // clock gating in OutputSwCfg1_H264()
624 WriteRegMFE(0x16, mfe_reg.reg16, "[%d] reg16", nRegWriteCount++, "Clock gating"); in OutputSwCfg1_H264()
H A Dmfe_reg_m4ve.c531 mfe_reg.reg16 = 0xffff; // clock gating in OutputSwCfg1_Mp4()
794 WriteRegMFE(0x16, mfe_reg.reg16, "[%d] reg16", nRegWriteCount++, "Clock gating"); in OutputSwCfg1_Mp4()
H A Dmfe_reg.h375 MFE_U16 reg16; member
H A Dmfe_common.c225 WriteRegMFE(0x16, mfe_reg.reg16, "[%d] reg16", nRegWriteCount++, "clock gating=0"); in ResetAllRegs()