| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 1296 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | regTSP.h | 1277 #define TSP_VQ3_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 4611 u32flag = TSP_VQ3_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | regTSP.h | 1268 #define TSP_VQ3_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 4574 u32flag = TSP_VQ3_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | regTSP.h | 1333 #define TSP_VQ3_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 4941 u32flag = TSP_VQ3_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | regTSP.h | 1337 #define TSP_VQ3_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 5266 u32flag = TSP_VQ3_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | regTSP.h | 1337 #define TSP_VQ3_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 5283 u32flag = TSP_VQ3_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | regTSP.h | 1357 #define TSP_VQ3_CLR_OVF_INT 0x80000000UL macro
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| H A D | halTSP.c | 5339 u32flag = TSP_VQ3_CLR_OVF_INT; in HAL_TSP_VQueue_Clr_OverflowInt()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | regTSP.h | 1357 #define TSP_VQ3_CLR_OVF_INT 0x80000000UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/ |
| H A D | regTSP.h | 1196 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/ |
| H A D | regTSP.h | 1235 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| H A D | halTSP.c | 4601 REG16_SET(&_RegCtrl->VQ3_Config, TSP_VQ3_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
4621 REG16_CLR(&_RegCtrl->VQ3_Config, TSP_VQ3_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | regTSP.h | 1237 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | regTSP.h | 1293 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | regTSP.h | 1259 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | regTSP.h | 1259 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/ |
| H A D | regTSP.h | 1295 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| H A D | halTSP.c | 5112 REG16_SET(&_RegCtrl->VQ3_Config, TSP_VQ3_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
5132 REG16_CLR(&_RegCtrl->VQ3_Config, TSP_VQ3_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/ |
| H A D | regTSP.h | 1259 #define TSP_VQ3_CLR_OVF_INT 0x8000 macro
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| H A D | halTSP.c | 4787 REG16_SET(&_RegCtrl->VQ3_Config, TSP_VQ3_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
4807 REG16_CLR(&_RegCtrl->VQ3_Config, TSP_VQ3_CLR_OVF_INT); in HAL_TSP_VQ_OverflowInt_Clr()
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