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Searched refs:TSP_CTRL1_PVR_CMD_QUEUE_ENABLE (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DhalTSP.c1777 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
1787 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2041 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
H A DregTSP.h764 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DhalTSP.c1782 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
1792 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2063 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
H A DregTSP.h760 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DhalTSP.c1778 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
1788 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2042 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
H A DregTSP.h764 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h893 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DhalTSP.c2449 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2459 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2824 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
H A DregTSP.h881 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h887 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
H A DhalTSP.c2686 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2696 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
3081 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h878 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
H A DhalTSP.c2651 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2661 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
3055 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c345 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_PVR_CMD_QUEUE_ENABLE); in HAL_TSP_Reset()
945 …REG16_SET(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_PVR_CMD_QUEUE_ENABLE); // for wishbone DMA (load firm… in HAL_TSP_TSIF_FileEn()
970 REG16_CLR(&_RegCtrl->TSP_Ctrl1, TSP_CTRL1_PVR_CMD_QUEUE_ENABLE); in HAL_TSP_TSIF_FileEn()
H A DregTSP.h806 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h909 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
H A DhalTSP.c2535 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2545 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
3024 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h913 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
H A DhalTSP.c2738 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2748 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
3244 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h913 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
H A DhalTSP.c2738 SET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
2748 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_filein_enable()
3244 RESET_FLAG1(_HAL_REG16_R(&_TspCtrl[0].TSP_Ctrl1), TSP_CTRL1_PVR_CMD_QUEUE_ENABLE)); in HAL_TSP_HwPatch()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h920 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h920 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h842 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h844 #define TSP_CTRL1_PVR_CMD_QUEUE_ENABLE 0x2000 macro

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