| /rk3399_rockchip-uboot/arch/arm/mach-sunxi/dram_timings/ |
| H A D | ddr3_1333.c | 13 u8 trcd = ns_to_t(15); in mctl_set_timing_params() local 67 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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| H A D | lpddr3_stock.c | 13 u8 trcd = max(ns_to_t(24), 2); in mctl_set_timing_params() local 63 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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| H A D | ddr2_v3s.c | 13 u8 trcd = ns_to_t(20); in mctl_set_timing_params() local 64 writel(DRAMTMG4_TRCD(trcd) | DRAMTMG4_TCCD(tccd) | DRAMTMG4_TRRD(trrd) | in mctl_set_timing_params()
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| /rk3399_rockchip-uboot/board/gateworks/gw_ventana/ |
| H A D | gw_ventana_spl.c | 160 .trcd = 1375, 174 .trcd = 1375, 188 .trcd = 1375, 202 .trcd = 1375,
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| /rk3399_rockchip-uboot/include/ |
| H A D | spd.h | 45 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
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| H A D | ddr_spd.h | 45 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member 107 unsigned char trcd; /* 29 Min RAS to CAS Delay (tRCD) */ member
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| /rk3399_rockchip-uboot/board/wandboard/ |
| H A D | spl.c | 141 .trcd = 1375, 155 .trcd = 1350,
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| /rk3399_rockchip-uboot/board/liebherr/mccmon6/ |
| H A D | spl.c | 141 .trcd = 1375, 155 .trcd = 1350,
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| /rk3399_rockchip-uboot/drivers/ram/ |
| H A D | stm32_sdram.c | 124 u8 trcd; member 194 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init() 204 writel(timing->trcd << FMC_SDTR_TRCD_SHIFT in stm32_sdram_init()
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| /rk3399_rockchip-uboot/board/ccv/xpress/ |
| H A D | spl.c | 75 .trcd = 1375,
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| /rk3399_rockchip-uboot/board/bachmann/ot1200/ |
| H A D | ot1200_spl.c | 101 .trcd = 1375,
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| /rk3399_rockchip-uboot/board/compulab/cm_fx6/ |
| H A D | spl.c | 120 .trcd = 1800, 189 .trcd = 1324,
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| /rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/ |
| H A D | opos6ul.c | 238 .trcd = 1500, 276 mem_ddr.trcd = 1375; in spl_dram_init()
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| H A D | litesom.c | 143 .trcd = 1375,
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| /rk3399_rockchip-uboot/board/barco/platinum/ |
| H A D | spl_picon.c | 96 .trcd = 1375,
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| H A D | spl_titanium.c | 96 .trcd = 1375,
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | sdram_rk3288.h | 53 u32 trcd; member
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/clock/ |
| H A D | rockchip,rk3288-dmc.txt | 50 rockchip,trcd: tRCD,AC timing parameters from the memory data-sheet 68 trcd 142 rockchip,trcd = <10>;
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| /rk3399_rockchip-uboot/board/engicam/common/ |
| H A D | spl.c | 167 .trcd = 1375, 317 .trcd = 1375,
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| /rk3399_rockchip-uboot/arch/arm/mach-sunxi/ |
| H A D | dram_sun8i_a83t.c | 96 u8 trcd = ns_to_t(15); in auto_set_timing_para() local 148 trcd = max(ns_to_t(24), 2); in auto_set_timing_para() 179 reg_val = (trcd << 24) | (tccd << 16) | (trrd << 8) | (trp << 0); in auto_set_timing_para()
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| H A D | dram_sun8i_a33.c | 96 u8 trcd = ns_to_t(15); in auto_set_timing_para() local 147 reg_val = (trcd << 24) | (tccd << 16) | (trrd << 8) | (trp << 0); in auto_set_timing_para()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-omap3/ |
| H A D | mem.h | 67 #define ACTIM_CTRLA(trfc, trc, tras, trp, trcd, trrd, tdpl, tdal) \ argument 72 ACTIM_CTRLA_TRCD(trcd) | \
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| /rk3399_rockchip-uboot/board/phytec/pfla02/ |
| H A D | pfla02.c | 503 .trcd = 1375, 518 .trcd = 1375, 533 .trcd = 1375,
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/ram/ |
| H A D | st,stm32-fmc.txt | 24 trcd
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| /rk3399_rockchip-uboot/board/liebherr/display5/ |
| H A D | spl.c | 100 .trcd = 1375,
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