History log of /rk3399_rockchip-uboot/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c (Results 1 – 2 of 2)
Revision Date Author Comments
# ebba9d1d 19-Jun-2017 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-sunxi


# 67337e68 03-Jun-2017 Icenowy Zheng <icenowy@aosc.xyz>

sunxi: add support for the DDR2 in V3s SoC

Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz

sunxi: add support for the DDR2 in V3s SoC

Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>

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