Home
last modified time | relevance | path

Searched refs:sys_reg (Results 1 – 18 of 18) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Dsdram.c30 u32 sys_reg = readl(reg); in rockchip_sdram_size() local
32 u32 ch_num = 1 + ((sys_reg >> SYS_REG_NUM_CH_SHIFT) in rockchip_sdram_size()
35 dram_type = (sys_reg >> SYS_REG_DDRTYPE_SHIFT) & SYS_REG_DDRTYPE_MASK; in rockchip_sdram_size()
36 debug("%s %x %x\n", __func__, (u32)reg, sys_reg); in rockchip_sdram_size()
38 rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) & in rockchip_sdram_size()
40 cs0_col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK); in rockchip_sdram_size()
42 bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK); in rockchip_sdram_size()
48 SYS_REG1_EXTEND_CS0_ROW_MASK) << 2) + (sys_reg >> in rockchip_sdram_size()
53 cs0_row = 13 + (sys_reg >> in rockchip_sdram_size()
60 SYS_REG1_EXTEND_CS1_ROW_MASK) << 2) + (sys_reg >> in rockchip_sdram_size()
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dpmu_rk3288.h50 u32 sys_reg[4]; member
52 check_member(rk3288_pmu, sys_reg[3], 0x00a0);
H A Dpmu_rk3188.h29 u32 sys_reg[4]; member
H A Dpmu_rv1108.h27 u32 sys_reg[4]; member
H A Dgrf_rk3128.h95 unsigned int sys_reg[4]; member
/rk3399_rockchip-uboot/drivers/ram/rockchip/
H A Dsdram_rk322x.c581 u32 sys_reg = 0; in dram_all_config() local
583 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
584 sys_reg |= (1 - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
585 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(0); in dram_all_config()
586 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(0); in dram_all_config()
587 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(0); in dram_all_config()
588 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(0); in dram_all_config()
589 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(0); in dram_all_config()
590 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(0); in dram_all_config()
591 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(0); in dram_all_config()
[all …]
H A Dsdram_rk3188.c539 u32 sys_reg = 0; in dram_all_config() local
541 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
542 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
547 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
548 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); in dram_all_config()
549 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); in dram_all_config()
550 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); in dram_all_config()
551 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); in dram_all_config()
552 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); in dram_all_config()
553 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); in dram_all_config()
[all …]
H A Ddmc-rk3368.c777 u32 sys_reg = 0; in dram_all_config() local
780 sys_reg |= DDR3 << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
781 sys_reg |= 0 << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
783 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
784 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); in dram_all_config()
785 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); in dram_all_config()
786 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); in dram_all_config()
787 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); in dram_all_config()
788 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); in dram_all_config()
789 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); in dram_all_config()
[all …]
H A Dsdram_rk3288.c596 u32 sys_reg = 0; in dram_all_config() local
598 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
599 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
604 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
605 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); in dram_all_config()
606 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); in dram_all_config()
607 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); in dram_all_config()
608 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); in dram_all_config()
609 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); in dram_all_config()
610 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); in dram_all_config()
[all …]
H A Dsdram_rk3328.c480 u32 sys_reg = 0; in sdram_init_detect() local
507 sys_reg = readl(&dram->grf->os_reg[2]); in sdram_init_detect()
510 sys_reg, sys_reg3, 0); in sdram_init_detect()
511 writel(sys_reg, &dram->grf->os_reg[2]); in sdram_init_detect()
H A Dsdram_px30.c603 u32 sys_reg = 0; in sdram_init_detect() local
623 sys_reg = readl(&dram->pmugrf->os_reg[2]); in sdram_init_detect()
626 sys_reg, sys_reg3, 0); in sdram_init_detect()
627 writel(sys_reg, &dram->pmugrf->os_reg[2]); in sdram_init_detect()
H A Dsdram_rv1126.c2909 u32 sys_reg = 0; in sdram_init_detect() local
2940 sys_reg = readl(&dram->pmugrf->os_reg[2]); in sdram_init_detect()
2943 sys_reg, sys_reg3, 0); in sdram_init_detect()
2944 writel(sys_reg, &dram->pmugrf->os_reg[2]); in sdram_init_detect()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3066/
H A Dsdram_rk3066.c526 u32 sys_reg = 0; in dram_all_config() local
528 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()
529 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
534 sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan); in dram_all_config()
535 sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan); in dram_all_config()
536 sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan); in dram_all_config()
537 sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan); in dram_all_config()
538 sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan); in dram_all_config()
539 sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan); in dram_all_config()
540 sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan); in dram_all_config()
[all …]
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dtegra20-tamonten.dtsi344 vin-sm0-supply = <&sys_reg>;
345 vin-sm1-supply = <&sys_reg>;
346 vin-sm2-supply = <&sys_reg>;
354 sys_reg: sys { label
H A Dtegra20-paz00.dts347 vin-sm0-supply = <&sys_reg>;
348 vin-sm1-supply = <&sys_reg>;
349 vin-sm2-supply = <&sys_reg>;
357 sys_reg: sys { label
H A Dtegra20-ventana.dts429 vin-sm0-supply = <&sys_reg>;
430 vin-sm1-supply = <&sys_reg>;
431 vin-sm2-supply = <&sys_reg>;
439 sys_reg: sys { label
H A Dtegra20-harmony.dts359 vin-sm0-supply = <&sys_reg>;
360 vin-sm1-supply = <&sys_reg>;
361 vin-sm2-supply = <&sys_reg>;
369 sys_reg: sys { label
H A Dtegra20-seaboard.dts474 vin-sm0-supply = <&sys_reg>;
475 vin-sm1-supply = <&sys_reg>;
476 vin-sm2-supply = <&sys_reg>;
484 sys_reg: sys { label