15ab502cbSMasahiro Yamada#include "tegra20.dtsi" 25ab502cbSMasahiro Yamada 35ab502cbSMasahiro Yamada/ { 45ab502cbSMasahiro Yamada model = "Avionic Design Tamonten SOM"; 55ab502cbSMasahiro Yamada compatible = "ad,tamonten", "nvidia,tegra20"; 65ab502cbSMasahiro Yamada 75ab502cbSMasahiro Yamada memory { 85ab502cbSMasahiro Yamada reg = <0x00000000 0x20000000>; 95ab502cbSMasahiro Yamada }; 105ab502cbSMasahiro Yamada 11*ee7d755aSSimon Glass host1x@50000000 { 125ab502cbSMasahiro Yamada hdmi { 135ab502cbSMasahiro Yamada vdd-supply = <&hdmi_vdd_reg>; 145ab502cbSMasahiro Yamada pll-supply = <&hdmi_pll_reg>; 155ab502cbSMasahiro Yamada 165ab502cbSMasahiro Yamada nvidia,ddc-i2c-bus = <&hdmi_ddc>; 172b2b50bcSSimon Glass nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 182b2b50bcSSimon Glass GPIO_ACTIVE_HIGH>; 195ab502cbSMasahiro Yamada }; 205ab502cbSMasahiro Yamada }; 215ab502cbSMasahiro Yamada 225ab502cbSMasahiro Yamada pinmux { 235ab502cbSMasahiro Yamada pinctrl-names = "default"; 245ab502cbSMasahiro Yamada pinctrl-0 = <&state_default>; 255ab502cbSMasahiro Yamada 265ab502cbSMasahiro Yamada state_default: pinmux { 275ab502cbSMasahiro Yamada ata { 285ab502cbSMasahiro Yamada nvidia,pins = "ata"; 295ab502cbSMasahiro Yamada nvidia,function = "ide"; 305ab502cbSMasahiro Yamada }; 315ab502cbSMasahiro Yamada atb { 325ab502cbSMasahiro Yamada nvidia,pins = "atb", "gma", "gme"; 335ab502cbSMasahiro Yamada nvidia,function = "sdio4"; 345ab502cbSMasahiro Yamada }; 355ab502cbSMasahiro Yamada atc { 365ab502cbSMasahiro Yamada nvidia,pins = "atc"; 375ab502cbSMasahiro Yamada nvidia,function = "nand"; 385ab502cbSMasahiro Yamada }; 395ab502cbSMasahiro Yamada atd { 405ab502cbSMasahiro Yamada nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu", 415ab502cbSMasahiro Yamada "spia", "spib", "spic"; 425ab502cbSMasahiro Yamada nvidia,function = "gmi"; 435ab502cbSMasahiro Yamada }; 445ab502cbSMasahiro Yamada cdev1 { 455ab502cbSMasahiro Yamada nvidia,pins = "cdev1"; 465ab502cbSMasahiro Yamada nvidia,function = "plla_out"; 475ab502cbSMasahiro Yamada }; 485ab502cbSMasahiro Yamada cdev2 { 495ab502cbSMasahiro Yamada nvidia,pins = "cdev2"; 505ab502cbSMasahiro Yamada nvidia,function = "pllp_out4"; 515ab502cbSMasahiro Yamada }; 525ab502cbSMasahiro Yamada crtp { 535ab502cbSMasahiro Yamada nvidia,pins = "crtp"; 545ab502cbSMasahiro Yamada nvidia,function = "crt"; 555ab502cbSMasahiro Yamada }; 565ab502cbSMasahiro Yamada csus { 575ab502cbSMasahiro Yamada nvidia,pins = "csus"; 585ab502cbSMasahiro Yamada nvidia,function = "vi_sensor_clk"; 595ab502cbSMasahiro Yamada }; 605ab502cbSMasahiro Yamada dap1 { 615ab502cbSMasahiro Yamada nvidia,pins = "dap1"; 625ab502cbSMasahiro Yamada nvidia,function = "dap1"; 635ab502cbSMasahiro Yamada }; 645ab502cbSMasahiro Yamada dap2 { 655ab502cbSMasahiro Yamada nvidia,pins = "dap2"; 665ab502cbSMasahiro Yamada nvidia,function = "dap2"; 675ab502cbSMasahiro Yamada }; 685ab502cbSMasahiro Yamada dap3 { 695ab502cbSMasahiro Yamada nvidia,pins = "dap3"; 705ab502cbSMasahiro Yamada nvidia,function = "dap3"; 715ab502cbSMasahiro Yamada }; 725ab502cbSMasahiro Yamada dap4 { 735ab502cbSMasahiro Yamada nvidia,pins = "dap4"; 745ab502cbSMasahiro Yamada nvidia,function = "dap4"; 755ab502cbSMasahiro Yamada }; 765ab502cbSMasahiro Yamada dta { 775ab502cbSMasahiro Yamada nvidia,pins = "dta", "dtd"; 785ab502cbSMasahiro Yamada nvidia,function = "sdio2"; 795ab502cbSMasahiro Yamada }; 805ab502cbSMasahiro Yamada dtb { 815ab502cbSMasahiro Yamada nvidia,pins = "dtb", "dtc", "dte"; 825ab502cbSMasahiro Yamada nvidia,function = "rsvd1"; 835ab502cbSMasahiro Yamada }; 845ab502cbSMasahiro Yamada dtf { 855ab502cbSMasahiro Yamada nvidia,pins = "dtf"; 865ab502cbSMasahiro Yamada nvidia,function = "i2c3"; 875ab502cbSMasahiro Yamada }; 885ab502cbSMasahiro Yamada gmc { 895ab502cbSMasahiro Yamada nvidia,pins = "gmc"; 905ab502cbSMasahiro Yamada nvidia,function = "uartd"; 915ab502cbSMasahiro Yamada }; 925ab502cbSMasahiro Yamada gpu7 { 935ab502cbSMasahiro Yamada nvidia,pins = "gpu7"; 945ab502cbSMasahiro Yamada nvidia,function = "rtck"; 955ab502cbSMasahiro Yamada }; 965ab502cbSMasahiro Yamada gpv { 975ab502cbSMasahiro Yamada nvidia,pins = "gpv", "slxa", "slxk"; 985ab502cbSMasahiro Yamada nvidia,function = "pcie"; 995ab502cbSMasahiro Yamada }; 1005ab502cbSMasahiro Yamada hdint { 1015ab502cbSMasahiro Yamada nvidia,pins = "hdint"; 1025ab502cbSMasahiro Yamada nvidia,function = "hdmi"; 1035ab502cbSMasahiro Yamada }; 1045ab502cbSMasahiro Yamada i2cp { 1055ab502cbSMasahiro Yamada nvidia,pins = "i2cp"; 1065ab502cbSMasahiro Yamada nvidia,function = "i2cp"; 1075ab502cbSMasahiro Yamada }; 1085ab502cbSMasahiro Yamada irrx { 1095ab502cbSMasahiro Yamada nvidia,pins = "irrx", "irtx"; 1105ab502cbSMasahiro Yamada nvidia,function = "uarta"; 1115ab502cbSMasahiro Yamada }; 1125ab502cbSMasahiro Yamada kbca { 1135ab502cbSMasahiro Yamada nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", 1145ab502cbSMasahiro Yamada "kbce", "kbcf"; 1155ab502cbSMasahiro Yamada nvidia,function = "kbc"; 1165ab502cbSMasahiro Yamada }; 1175ab502cbSMasahiro Yamada lcsn { 1185ab502cbSMasahiro Yamada nvidia,pins = "lcsn", "ld0", "ld1", "ld2", 1195ab502cbSMasahiro Yamada "ld3", "ld4", "ld5", "ld6", "ld7", 1205ab502cbSMasahiro Yamada "ld8", "ld9", "ld10", "ld11", "ld12", 1215ab502cbSMasahiro Yamada "ld13", "ld14", "ld15", "ld16", "ld17", 1225ab502cbSMasahiro Yamada "ldc", "ldi", "lhp0", "lhp1", "lhp2", 1235ab502cbSMasahiro Yamada "lhs", "lm0", "lm1", "lpp", "lpw0", 1245ab502cbSMasahiro Yamada "lpw1", "lpw2", "lsc0", "lsc1", "lsck", 1255ab502cbSMasahiro Yamada "lsda", "lsdi", "lspi", "lvp0", "lvp1", 1265ab502cbSMasahiro Yamada "lvs"; 1275ab502cbSMasahiro Yamada nvidia,function = "displaya"; 1285ab502cbSMasahiro Yamada }; 1295ab502cbSMasahiro Yamada owc { 1305ab502cbSMasahiro Yamada nvidia,pins = "owc", "spdi", "spdo", "uac"; 1315ab502cbSMasahiro Yamada nvidia,function = "rsvd2"; 1325ab502cbSMasahiro Yamada }; 1335ab502cbSMasahiro Yamada pmc { 1345ab502cbSMasahiro Yamada nvidia,pins = "pmc"; 1355ab502cbSMasahiro Yamada nvidia,function = "pwr_on"; 1365ab502cbSMasahiro Yamada }; 1375ab502cbSMasahiro Yamada rm { 1385ab502cbSMasahiro Yamada nvidia,pins = "rm"; 1395ab502cbSMasahiro Yamada nvidia,function = "i2c1"; 1405ab502cbSMasahiro Yamada }; 1415ab502cbSMasahiro Yamada sdb { 1425ab502cbSMasahiro Yamada nvidia,pins = "sdb", "sdc", "sdd"; 1435ab502cbSMasahiro Yamada nvidia,function = "pwm"; 1445ab502cbSMasahiro Yamada }; 1455ab502cbSMasahiro Yamada sdio1 { 1465ab502cbSMasahiro Yamada nvidia,pins = "sdio1"; 1475ab502cbSMasahiro Yamada nvidia,function = "sdio1"; 1485ab502cbSMasahiro Yamada }; 1495ab502cbSMasahiro Yamada slxc { 1505ab502cbSMasahiro Yamada nvidia,pins = "slxc", "slxd"; 1515ab502cbSMasahiro Yamada nvidia,function = "spdif"; 1525ab502cbSMasahiro Yamada }; 1535ab502cbSMasahiro Yamada spid { 1545ab502cbSMasahiro Yamada nvidia,pins = "spid", "spie", "spif"; 1555ab502cbSMasahiro Yamada nvidia,function = "spi1"; 1565ab502cbSMasahiro Yamada }; 1575ab502cbSMasahiro Yamada spig { 1585ab502cbSMasahiro Yamada nvidia,pins = "spig", "spih"; 1595ab502cbSMasahiro Yamada nvidia,function = "spi2_alt"; 1605ab502cbSMasahiro Yamada }; 1615ab502cbSMasahiro Yamada uaa { 1625ab502cbSMasahiro Yamada nvidia,pins = "uaa", "uab", "uda"; 1635ab502cbSMasahiro Yamada nvidia,function = "ulpi"; 1645ab502cbSMasahiro Yamada }; 1655ab502cbSMasahiro Yamada uad { 1665ab502cbSMasahiro Yamada nvidia,pins = "uad"; 1675ab502cbSMasahiro Yamada nvidia,function = "irda"; 1685ab502cbSMasahiro Yamada }; 1695ab502cbSMasahiro Yamada uca { 1705ab502cbSMasahiro Yamada nvidia,pins = "uca", "ucb"; 1715ab502cbSMasahiro Yamada nvidia,function = "uartc"; 1725ab502cbSMasahiro Yamada }; 1735ab502cbSMasahiro Yamada conf_ata { 1745ab502cbSMasahiro Yamada nvidia,pins = "ata", "atb", "atc", "atd", "ate", 1755ab502cbSMasahiro Yamada "cdev1", "cdev2", "dap1", "dtb", "gma", 1765ab502cbSMasahiro Yamada "gmb", "gmc", "gmd", "gme", "gpu7", 1775ab502cbSMasahiro Yamada "gpv", "i2cp", "pta", "rm", "slxa", 1785ab502cbSMasahiro Yamada "slxk", "spia", "spib", "uac"; 1795ab502cbSMasahiro Yamada nvidia,pull = <0>; 1805ab502cbSMasahiro Yamada nvidia,tristate = <0>; 1815ab502cbSMasahiro Yamada }; 1825ab502cbSMasahiro Yamada conf_ck32 { 1835ab502cbSMasahiro Yamada nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 1845ab502cbSMasahiro Yamada "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 1855ab502cbSMasahiro Yamada nvidia,pull = <0>; 1865ab502cbSMasahiro Yamada }; 1875ab502cbSMasahiro Yamada conf_csus { 1885ab502cbSMasahiro Yamada nvidia,pins = "csus", "spid", "spif"; 1895ab502cbSMasahiro Yamada nvidia,pull = <1>; 1905ab502cbSMasahiro Yamada nvidia,tristate = <1>; 1915ab502cbSMasahiro Yamada }; 1925ab502cbSMasahiro Yamada conf_crtp { 1935ab502cbSMasahiro Yamada nvidia,pins = "crtp", "dap2", "dap3", "dap4", 1945ab502cbSMasahiro Yamada "dtc", "dte", "dtf", "gpu", "sdio1", 1955ab502cbSMasahiro Yamada "slxc", "slxd", "spdi", "spdo", "spig", 1965ab502cbSMasahiro Yamada "uda"; 1975ab502cbSMasahiro Yamada nvidia,pull = <0>; 1985ab502cbSMasahiro Yamada nvidia,tristate = <1>; 1995ab502cbSMasahiro Yamada }; 2005ab502cbSMasahiro Yamada conf_ddc { 2015ab502cbSMasahiro Yamada nvidia,pins = "ddc", "dta", "dtd", "kbca", 2025ab502cbSMasahiro Yamada "kbcb", "kbcc", "kbcd", "kbce", "kbcf", 2035ab502cbSMasahiro Yamada "sdc"; 2045ab502cbSMasahiro Yamada nvidia,pull = <2>; 2055ab502cbSMasahiro Yamada nvidia,tristate = <0>; 2065ab502cbSMasahiro Yamada }; 2075ab502cbSMasahiro Yamada conf_hdint { 2085ab502cbSMasahiro Yamada nvidia,pins = "hdint", "lcsn", "ldc", "lm1", 2095ab502cbSMasahiro Yamada "lpw1", "lsc1", "lsck", "lsda", "lsdi", 2105ab502cbSMasahiro Yamada "lvp0", "owc", "sdb"; 2115ab502cbSMasahiro Yamada nvidia,tristate = <1>; 2125ab502cbSMasahiro Yamada }; 2135ab502cbSMasahiro Yamada conf_irrx { 2145ab502cbSMasahiro Yamada nvidia,pins = "irrx", "irtx", "sdd", "spic", 2155ab502cbSMasahiro Yamada "spie", "spih", "uaa", "uab", "uad", 2165ab502cbSMasahiro Yamada "uca", "ucb"; 2175ab502cbSMasahiro Yamada nvidia,pull = <2>; 2185ab502cbSMasahiro Yamada nvidia,tristate = <1>; 2195ab502cbSMasahiro Yamada }; 2205ab502cbSMasahiro Yamada conf_lc { 2215ab502cbSMasahiro Yamada nvidia,pins = "lc", "ls"; 2225ab502cbSMasahiro Yamada nvidia,pull = <2>; 2235ab502cbSMasahiro Yamada }; 2245ab502cbSMasahiro Yamada conf_ld0 { 2255ab502cbSMasahiro Yamada nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", 2265ab502cbSMasahiro Yamada "ld5", "ld6", "ld7", "ld8", "ld9", 2275ab502cbSMasahiro Yamada "ld10", "ld11", "ld12", "ld13", "ld14", 2285ab502cbSMasahiro Yamada "ld15", "ld16", "ld17", "ldi", "lhp0", 2295ab502cbSMasahiro Yamada "lhp1", "lhp2", "lhs", "lm0", "lpp", 2305ab502cbSMasahiro Yamada "lpw0", "lpw2", "lsc0", "lspi", "lvp1", 2315ab502cbSMasahiro Yamada "lvs", "pmc"; 2325ab502cbSMasahiro Yamada nvidia,tristate = <0>; 2335ab502cbSMasahiro Yamada }; 2345ab502cbSMasahiro Yamada conf_ld17_0 { 2355ab502cbSMasahiro Yamada nvidia,pins = "ld17_0", "ld19_18", "ld21_20", 2365ab502cbSMasahiro Yamada "ld23_22"; 2375ab502cbSMasahiro Yamada nvidia,pull = <1>; 2385ab502cbSMasahiro Yamada }; 2395ab502cbSMasahiro Yamada }; 2405ab502cbSMasahiro Yamada 2415ab502cbSMasahiro Yamada state_i2cmux_ddc: pinmux_i2cmux_ddc { 2425ab502cbSMasahiro Yamada ddc { 2435ab502cbSMasahiro Yamada nvidia,pins = "ddc"; 2445ab502cbSMasahiro Yamada nvidia,function = "i2c2"; 2455ab502cbSMasahiro Yamada }; 2465ab502cbSMasahiro Yamada pta { 2475ab502cbSMasahiro Yamada nvidia,pins = "pta"; 2485ab502cbSMasahiro Yamada nvidia,function = "rsvd4"; 2495ab502cbSMasahiro Yamada }; 2505ab502cbSMasahiro Yamada }; 2515ab502cbSMasahiro Yamada 2525ab502cbSMasahiro Yamada state_i2cmux_pta: pinmux_i2cmux_pta { 2535ab502cbSMasahiro Yamada ddc { 2545ab502cbSMasahiro Yamada nvidia,pins = "ddc"; 2555ab502cbSMasahiro Yamada nvidia,function = "rsvd4"; 2565ab502cbSMasahiro Yamada }; 2575ab502cbSMasahiro Yamada pta { 2585ab502cbSMasahiro Yamada nvidia,pins = "pta"; 2595ab502cbSMasahiro Yamada nvidia,function = "i2c2"; 2605ab502cbSMasahiro Yamada }; 2615ab502cbSMasahiro Yamada }; 2625ab502cbSMasahiro Yamada 2635ab502cbSMasahiro Yamada state_i2cmux_idle: pinmux_i2cmux_idle { 2645ab502cbSMasahiro Yamada ddc { 2655ab502cbSMasahiro Yamada nvidia,pins = "ddc"; 2665ab502cbSMasahiro Yamada nvidia,function = "rsvd4"; 2675ab502cbSMasahiro Yamada }; 2685ab502cbSMasahiro Yamada pta { 2695ab502cbSMasahiro Yamada nvidia,pins = "pta"; 2705ab502cbSMasahiro Yamada nvidia,function = "rsvd4"; 2715ab502cbSMasahiro Yamada }; 2725ab502cbSMasahiro Yamada }; 2735ab502cbSMasahiro Yamada }; 2745ab502cbSMasahiro Yamada 2755ab502cbSMasahiro Yamada i2s@70002800 { 2765ab502cbSMasahiro Yamada status = "okay"; 2775ab502cbSMasahiro Yamada }; 2785ab502cbSMasahiro Yamada 2795ab502cbSMasahiro Yamada serial@70006300 { 2805ab502cbSMasahiro Yamada status = "okay"; 2815ab502cbSMasahiro Yamada }; 2825ab502cbSMasahiro Yamada 2835ab502cbSMasahiro Yamada nand-controller@70008000 { 2842b2b50bcSSimon Glass nvidia,wp-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>; 2855ab502cbSMasahiro Yamada nvidia,width = <8>; 2865ab502cbSMasahiro Yamada nvidia,timing = <26 100 20 80 20 10 12 10 70>; 2875ab502cbSMasahiro Yamada 2885ab502cbSMasahiro Yamada nand@0 { 2895ab502cbSMasahiro Yamada reg = <0>; 2905ab502cbSMasahiro Yamada compatible = "hynix,hy27uf4g2b", "nand-flash"; 2915ab502cbSMasahiro Yamada }; 2925ab502cbSMasahiro Yamada }; 2935ab502cbSMasahiro Yamada 2945ab502cbSMasahiro Yamada i2c@7000c000 { 2955ab502cbSMasahiro Yamada clock-frequency = <400000>; 2965ab502cbSMasahiro Yamada status = "okay"; 2975ab502cbSMasahiro Yamada }; 2985ab502cbSMasahiro Yamada 2995ab502cbSMasahiro Yamada i2c@7000c400 { 3005ab502cbSMasahiro Yamada clock-frequency = <100000>; 3015ab502cbSMasahiro Yamada status = "okay"; 3025ab502cbSMasahiro Yamada }; 3035ab502cbSMasahiro Yamada 3045ab502cbSMasahiro Yamada i2cmux { 3055ab502cbSMasahiro Yamada compatible = "i2c-mux-pinctrl"; 3065ab502cbSMasahiro Yamada #address-cells = <1>; 3075ab502cbSMasahiro Yamada #size-cells = <0>; 3085ab502cbSMasahiro Yamada 3095ab502cbSMasahiro Yamada i2c-parent = <&{/i2c@7000c400}>; 3105ab502cbSMasahiro Yamada 3115ab502cbSMasahiro Yamada pinctrl-names = "ddc", "pta", "idle"; 3125ab502cbSMasahiro Yamada pinctrl-0 = <&state_i2cmux_ddc>; 3135ab502cbSMasahiro Yamada pinctrl-1 = <&state_i2cmux_pta>; 3145ab502cbSMasahiro Yamada pinctrl-2 = <&state_i2cmux_idle>; 3155ab502cbSMasahiro Yamada 3165ab502cbSMasahiro Yamada hdmi_ddc: i2c@0 { 3175ab502cbSMasahiro Yamada reg = <0>; 3185ab502cbSMasahiro Yamada #address-cells = <1>; 3195ab502cbSMasahiro Yamada #size-cells = <0>; 3205ab502cbSMasahiro Yamada }; 3215ab502cbSMasahiro Yamada 3225ab502cbSMasahiro Yamada i2c@1 { 3235ab502cbSMasahiro Yamada reg = <1>; 3245ab502cbSMasahiro Yamada #address-cells = <1>; 3255ab502cbSMasahiro Yamada #size-cells = <0>; 3265ab502cbSMasahiro Yamada }; 3275ab502cbSMasahiro Yamada }; 3285ab502cbSMasahiro Yamada 3295ab502cbSMasahiro Yamada i2c@7000d000 { 3305ab502cbSMasahiro Yamada clock-frequency = <400000>; 3315ab502cbSMasahiro Yamada status = "okay"; 3325ab502cbSMasahiro Yamada 3335ab502cbSMasahiro Yamada pmic: tps6586x@34 { 3345ab502cbSMasahiro Yamada compatible = "ti,tps6586x"; 3355ab502cbSMasahiro Yamada reg = <0x34>; 3365ab502cbSMasahiro Yamada interrupts = <0 86 0x4>; 3375ab502cbSMasahiro Yamada 3385ab502cbSMasahiro Yamada ti,system-power-controller; 3395ab502cbSMasahiro Yamada 3405ab502cbSMasahiro Yamada #gpio-cells = <2>; 3415ab502cbSMasahiro Yamada gpio-controller; 3425ab502cbSMasahiro Yamada 3435ab502cbSMasahiro Yamada sys-supply = <&vdd_5v0_reg>; 3445ab502cbSMasahiro Yamada vin-sm0-supply = <&sys_reg>; 3455ab502cbSMasahiro Yamada vin-sm1-supply = <&sys_reg>; 3465ab502cbSMasahiro Yamada vin-sm2-supply = <&sys_reg>; 3475ab502cbSMasahiro Yamada vinldo01-supply = <&sm2_reg>; 3485ab502cbSMasahiro Yamada vinldo23-supply = <&sm2_reg>; 3495ab502cbSMasahiro Yamada vinldo4-supply = <&sm2_reg>; 3505ab502cbSMasahiro Yamada vinldo678-supply = <&sm2_reg>; 3515ab502cbSMasahiro Yamada vinldo9-supply = <&sm2_reg>; 3525ab502cbSMasahiro Yamada 3535ab502cbSMasahiro Yamada regulators { 3545ab502cbSMasahiro Yamada sys_reg: sys { 3555ab502cbSMasahiro Yamada regulator-name = "vdd_sys"; 3565ab502cbSMasahiro Yamada regulator-always-on; 3575ab502cbSMasahiro Yamada }; 3585ab502cbSMasahiro Yamada 3595ab502cbSMasahiro Yamada sm0 { 3605ab502cbSMasahiro Yamada regulator-name = "vdd_sys_sm0,vdd_core"; 3615ab502cbSMasahiro Yamada regulator-min-microvolt = <1200000>; 3625ab502cbSMasahiro Yamada regulator-max-microvolt = <1200000>; 3635ab502cbSMasahiro Yamada regulator-always-on; 3645ab502cbSMasahiro Yamada }; 3655ab502cbSMasahiro Yamada 3665ab502cbSMasahiro Yamada sm1 { 3675ab502cbSMasahiro Yamada regulator-name = "vdd_sys_sm1,vdd_cpu"; 3685ab502cbSMasahiro Yamada regulator-min-microvolt = <1000000>; 3695ab502cbSMasahiro Yamada regulator-max-microvolt = <1000000>; 3705ab502cbSMasahiro Yamada regulator-always-on; 3715ab502cbSMasahiro Yamada }; 3725ab502cbSMasahiro Yamada 3735ab502cbSMasahiro Yamada sm2_reg: sm2 { 3745ab502cbSMasahiro Yamada regulator-name = "vdd_sys_sm2,vin_ldo*"; 3755ab502cbSMasahiro Yamada regulator-min-microvolt = <3700000>; 3765ab502cbSMasahiro Yamada regulator-max-microvolt = <3700000>; 3775ab502cbSMasahiro Yamada regulator-always-on; 3785ab502cbSMasahiro Yamada }; 3795ab502cbSMasahiro Yamada 3805ab502cbSMasahiro Yamada ldo0 { 3815ab502cbSMasahiro Yamada regulator-name = "vdd_ldo0,vddio_pex_clk"; 3825ab502cbSMasahiro Yamada regulator-min-microvolt = <3300000>; 3835ab502cbSMasahiro Yamada regulator-max-microvolt = <3300000>; 3845ab502cbSMasahiro Yamada }; 3855ab502cbSMasahiro Yamada 3865ab502cbSMasahiro Yamada ldo1 { 3875ab502cbSMasahiro Yamada regulator-name = "vdd_ldo1,avdd_pll*"; 3885ab502cbSMasahiro Yamada regulator-min-microvolt = <1100000>; 3895ab502cbSMasahiro Yamada regulator-max-microvolt = <1100000>; 3905ab502cbSMasahiro Yamada regulator-always-on; 3915ab502cbSMasahiro Yamada }; 3925ab502cbSMasahiro Yamada 3935ab502cbSMasahiro Yamada ldo2 { 3945ab502cbSMasahiro Yamada regulator-name = "vdd_ldo2,vdd_rtc"; 3955ab502cbSMasahiro Yamada regulator-min-microvolt = <1200000>; 3965ab502cbSMasahiro Yamada regulator-max-microvolt = <1200000>; 3975ab502cbSMasahiro Yamada }; 3985ab502cbSMasahiro Yamada 3995ab502cbSMasahiro Yamada ldo3 { 4005ab502cbSMasahiro Yamada regulator-name = "vdd_ldo3,avdd_usb*"; 4015ab502cbSMasahiro Yamada regulator-min-microvolt = <3300000>; 4025ab502cbSMasahiro Yamada regulator-max-microvolt = <3300000>; 4035ab502cbSMasahiro Yamada regulator-always-on; 4045ab502cbSMasahiro Yamada }; 4055ab502cbSMasahiro Yamada 4065ab502cbSMasahiro Yamada ldo4 { 4075ab502cbSMasahiro Yamada regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; 4085ab502cbSMasahiro Yamada regulator-min-microvolt = <1800000>; 4095ab502cbSMasahiro Yamada regulator-max-microvolt = <1800000>; 4105ab502cbSMasahiro Yamada regulator-always-on; 4115ab502cbSMasahiro Yamada }; 4125ab502cbSMasahiro Yamada 4135ab502cbSMasahiro Yamada ldo5 { 4145ab502cbSMasahiro Yamada regulator-name = "vdd_ldo5,vcore_mmc"; 4155ab502cbSMasahiro Yamada regulator-min-microvolt = <2850000>; 4165ab502cbSMasahiro Yamada regulator-max-microvolt = <2850000>; 4175ab502cbSMasahiro Yamada }; 4185ab502cbSMasahiro Yamada 4195ab502cbSMasahiro Yamada ldo6 { 4205ab502cbSMasahiro Yamada regulator-name = "vdd_ldo6,avdd_vdac"; 4215ab502cbSMasahiro Yamada /* 4225ab502cbSMasahiro Yamada * According to the Tegra 2 Automotive 4235ab502cbSMasahiro Yamada * DataSheet, a typical value for this 4245ab502cbSMasahiro Yamada * would be 2.8V, but the PMIC only 4255ab502cbSMasahiro Yamada * supports 2.85V. 4265ab502cbSMasahiro Yamada */ 4275ab502cbSMasahiro Yamada regulator-min-microvolt = <2850000>; 4285ab502cbSMasahiro Yamada regulator-max-microvolt = <2850000>; 4295ab502cbSMasahiro Yamada }; 4305ab502cbSMasahiro Yamada 4315ab502cbSMasahiro Yamada hdmi_vdd_reg: ldo7 { 4325ab502cbSMasahiro Yamada regulator-name = "vdd_ldo7,avdd_hdmi"; 4335ab502cbSMasahiro Yamada regulator-min-microvolt = <3300000>; 4345ab502cbSMasahiro Yamada regulator-max-microvolt = <3300000>; 4355ab502cbSMasahiro Yamada }; 4365ab502cbSMasahiro Yamada 4375ab502cbSMasahiro Yamada hdmi_pll_reg: ldo8 { 4385ab502cbSMasahiro Yamada regulator-name = "vdd_ldo8,avdd_hdmi_pll"; 4395ab502cbSMasahiro Yamada regulator-min-microvolt = <1800000>; 4405ab502cbSMasahiro Yamada regulator-max-microvolt = <1800000>; 4415ab502cbSMasahiro Yamada }; 4425ab502cbSMasahiro Yamada 4435ab502cbSMasahiro Yamada ldo9 { 4445ab502cbSMasahiro Yamada regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam"; 4455ab502cbSMasahiro Yamada /* 4465ab502cbSMasahiro Yamada * According to the Tegra 2 Automotive 4475ab502cbSMasahiro Yamada * DataSheet, a typical value for this 4485ab502cbSMasahiro Yamada * would be 2.8V, but the PMIC only 4495ab502cbSMasahiro Yamada * supports 2.85V. 4505ab502cbSMasahiro Yamada */ 4515ab502cbSMasahiro Yamada regulator-min-microvolt = <2850000>; 4525ab502cbSMasahiro Yamada regulator-max-microvolt = <2850000>; 4535ab502cbSMasahiro Yamada regulator-always-on; 4545ab502cbSMasahiro Yamada }; 4555ab502cbSMasahiro Yamada 4565ab502cbSMasahiro Yamada ldo_rtc { 4575ab502cbSMasahiro Yamada regulator-name = "vdd_rtc_out"; 4585ab502cbSMasahiro Yamada regulator-min-microvolt = <3300000>; 4595ab502cbSMasahiro Yamada regulator-max-microvolt = <3300000>; 4605ab502cbSMasahiro Yamada regulator-always-on; 4615ab502cbSMasahiro Yamada }; 4625ab502cbSMasahiro Yamada }; 4635ab502cbSMasahiro Yamada }; 4645ab502cbSMasahiro Yamada 4655ab502cbSMasahiro Yamada temperature-sensor@4c { 4665ab502cbSMasahiro Yamada compatible = "onnn,nct1008"; 4675ab502cbSMasahiro Yamada reg = <0x4c>; 4685ab502cbSMasahiro Yamada }; 4695ab502cbSMasahiro Yamada }; 4705ab502cbSMasahiro Yamada 4715ab502cbSMasahiro Yamada pmc { 4725ab502cbSMasahiro Yamada nvidia,invert-interrupt; 4735ab502cbSMasahiro Yamada }; 4745ab502cbSMasahiro Yamada 4755ab502cbSMasahiro Yamada usb@c5008000 { 4765ab502cbSMasahiro Yamada status = "okay"; 4775ab502cbSMasahiro Yamada }; 4785ab502cbSMasahiro Yamada 4795ab502cbSMasahiro Yamada sdhci@c8000600 { 4802b2b50bcSSimon Glass cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>; 4812b2b50bcSSimon Glass wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 4825ab502cbSMasahiro Yamada bus-width = <4>; 4835ab502cbSMasahiro Yamada status = "okay"; 4845ab502cbSMasahiro Yamada }; 4855ab502cbSMasahiro Yamada 486*ee7d755aSSimon Glass clocks { 487*ee7d755aSSimon Glass compatible = "simple-bus"; 488*ee7d755aSSimon Glass #address-cells = <1>; 489*ee7d755aSSimon Glass #size-cells = <0>; 490*ee7d755aSSimon Glass 491*ee7d755aSSimon Glass clk32k_in: clock@0 { 492*ee7d755aSSimon Glass compatible = "fixed-clock"; 493*ee7d755aSSimon Glass reg=<0>; 494*ee7d755aSSimon Glass #clock-cells = <0>; 495*ee7d755aSSimon Glass clock-frequency = <32768>; 496*ee7d755aSSimon Glass }; 497*ee7d755aSSimon Glass }; 498*ee7d755aSSimon Glass 4995ab502cbSMasahiro Yamada regulators { 5005ab502cbSMasahiro Yamada compatible = "simple-bus"; 5015ab502cbSMasahiro Yamada 5025ab502cbSMasahiro Yamada #address-cells = <1>; 5035ab502cbSMasahiro Yamada #size-cells = <0>; 5045ab502cbSMasahiro Yamada 5055ab502cbSMasahiro Yamada vdd_5v0_reg: regulator@0 { 5065ab502cbSMasahiro Yamada compatible = "regulator-fixed"; 5075ab502cbSMasahiro Yamada reg = <0>; 5085ab502cbSMasahiro Yamada regulator-name = "vdd_5v0"; 5095ab502cbSMasahiro Yamada regulator-min-microvolt = <5000000>; 5105ab502cbSMasahiro Yamada regulator-max-microvolt = <5000000>; 5115ab502cbSMasahiro Yamada regulator-always-on; 5125ab502cbSMasahiro Yamada }; 5135ab502cbSMasahiro Yamada }; 5145ab502cbSMasahiro Yamada}; 515