15ab502cbSMasahiro Yamada/dts-v1/; 25ab502cbSMasahiro Yamada 3*7298b305SMisha Komarovskiy#include <dt-bindings/input/input.h> 45ab502cbSMasahiro Yamada#include "tegra20.dtsi" 55ab502cbSMasahiro Yamada 65ab502cbSMasahiro Yamada/ { 75ab502cbSMasahiro Yamada model = "Toshiba AC100 / Dynabook AZ"; 85ab502cbSMasahiro Yamada compatible = "compal,paz00", "nvidia,tegra20"; 95ab502cbSMasahiro Yamada 10c3691392SSimon Glass chosen { 11c3691392SSimon Glass stdout-path = &uarta; 12c3691392SSimon Glass }; 13c3691392SSimon Glass 145ab502cbSMasahiro Yamada aliases { 15*7298b305SMisha Komarovskiy rtc0 = "/i2c@7000d000/tps6586x@34"; 16*7298b305SMisha Komarovskiy rtc1 = "/rtc@7000e000"; 17*7298b305SMisha Komarovskiy serial0 = &uarta; 18*7298b305SMisha Komarovskiy serial1 = &uartc; 19*7298b305SMisha Komarovskiy usb0 = "/usb@c5000000"; 20*7298b305SMisha Komarovskiy usb1 = "/usb@c5004000"; 21*7298b305SMisha Komarovskiy usb2 = "/usb@c5008000"; 2267748a73SStephen Warren mmc0 = "/sdhci@c8000600"; 2367748a73SStephen Warren mmc1 = "/sdhci@c8000000"; 245ab502cbSMasahiro Yamada }; 255ab502cbSMasahiro Yamada 265ab502cbSMasahiro Yamada memory { 275ab502cbSMasahiro Yamada reg = <0x00000000 0x20000000>; 285ab502cbSMasahiro Yamada }; 295ab502cbSMasahiro Yamada 30ee7d755aSSimon Glass host1x@50000000 { 315ab502cbSMasahiro Yamada status = "okay"; 325ab502cbSMasahiro Yamada dc@54200000 { 335ab502cbSMasahiro Yamada status = "okay"; 345ab502cbSMasahiro Yamada rgb { 355ab502cbSMasahiro Yamada status = "okay"; 36*7298b305SMisha Komarovskiy 37*7298b305SMisha Komarovskiy nvidia,panel = <&panel>; 38*7298b305SMisha Komarovskiy 39*7298b305SMisha Komarovskiy display-timings { 40*7298b305SMisha Komarovskiy timing@0 { 41*7298b305SMisha Komarovskiy /* PAZ00 has 1024x600 */ 42*7298b305SMisha Komarovskiy clock-frequency = <54030000>; 43*7298b305SMisha Komarovskiy hactive = <1024>; 44*7298b305SMisha Komarovskiy vactive = <600>; 45*7298b305SMisha Komarovskiy hback-porch = <160>; 46*7298b305SMisha Komarovskiy hfront-porch = <24>; 47*7298b305SMisha Komarovskiy hsync-len = <136>; 48*7298b305SMisha Komarovskiy vback-porch = <3>; 49*7298b305SMisha Komarovskiy vfront-porch = <61>; 50*7298b305SMisha Komarovskiy vsync-len = <6>; 51*7298b305SMisha Komarovskiy hsync-active = <1>; 525ab502cbSMasahiro Yamada }; 535ab502cbSMasahiro Yamada }; 545ab502cbSMasahiro Yamada }; 55*7298b305SMisha Komarovskiy }; 56*7298b305SMisha Komarovskiy 57*7298b305SMisha Komarovskiy hdmi@54280000 { 58*7298b305SMisha Komarovskiy status = "okay"; 59*7298b305SMisha Komarovskiy 60*7298b305SMisha Komarovskiy vdd-supply = <&hdmi_vdd_reg>; 61*7298b305SMisha Komarovskiy pll-supply = <&hdmi_pll_reg>; 62*7298b305SMisha Komarovskiy 63*7298b305SMisha Komarovskiy nvidia,ddc-i2c-bus = <&hdmi_ddc>; 64*7298b305SMisha Komarovskiy nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 65*7298b305SMisha Komarovskiy GPIO_ACTIVE_HIGH>; 66*7298b305SMisha Komarovskiy }; 67*7298b305SMisha Komarovskiy }; 68*7298b305SMisha Komarovskiy 69*7298b305SMisha Komarovskiy pinmux@70000014 { 70*7298b305SMisha Komarovskiy pinctrl-names = "default"; 71*7298b305SMisha Komarovskiy pinctrl-0 = <&state_default>; 72*7298b305SMisha Komarovskiy 73*7298b305SMisha Komarovskiy state_default: pinmux { 74*7298b305SMisha Komarovskiy ata { 75*7298b305SMisha Komarovskiy nvidia,pins = "ata", "atc", "atd", "ate", 76*7298b305SMisha Komarovskiy "dap2", "gmb", "gmc", "gmd", "spia", 77*7298b305SMisha Komarovskiy "spib", "spic", "spid", "spie"; 78*7298b305SMisha Komarovskiy nvidia,function = "gmi"; 79*7298b305SMisha Komarovskiy }; 80*7298b305SMisha Komarovskiy atb { 81*7298b305SMisha Komarovskiy nvidia,pins = "atb", "gma", "gme"; 82*7298b305SMisha Komarovskiy nvidia,function = "sdio4"; 83*7298b305SMisha Komarovskiy }; 84*7298b305SMisha Komarovskiy cdev1 { 85*7298b305SMisha Komarovskiy nvidia,pins = "cdev1"; 86*7298b305SMisha Komarovskiy nvidia,function = "plla_out"; 87*7298b305SMisha Komarovskiy }; 88*7298b305SMisha Komarovskiy cdev2 { 89*7298b305SMisha Komarovskiy nvidia,pins = "cdev2"; 90*7298b305SMisha Komarovskiy nvidia,function = "pllp_out4"; 91*7298b305SMisha Komarovskiy }; 92*7298b305SMisha Komarovskiy crtp { 93*7298b305SMisha Komarovskiy nvidia,pins = "crtp"; 94*7298b305SMisha Komarovskiy nvidia,function = "crt"; 95*7298b305SMisha Komarovskiy }; 96*7298b305SMisha Komarovskiy csus { 97*7298b305SMisha Komarovskiy nvidia,pins = "csus"; 98*7298b305SMisha Komarovskiy nvidia,function = "pllc_out1"; 99*7298b305SMisha Komarovskiy }; 100*7298b305SMisha Komarovskiy dap1 { 101*7298b305SMisha Komarovskiy nvidia,pins = "dap1"; 102*7298b305SMisha Komarovskiy nvidia,function = "dap1"; 103*7298b305SMisha Komarovskiy }; 104*7298b305SMisha Komarovskiy dap3 { 105*7298b305SMisha Komarovskiy nvidia,pins = "dap3"; 106*7298b305SMisha Komarovskiy nvidia,function = "dap3"; 107*7298b305SMisha Komarovskiy }; 108*7298b305SMisha Komarovskiy dap4 { 109*7298b305SMisha Komarovskiy nvidia,pins = "dap4"; 110*7298b305SMisha Komarovskiy nvidia,function = "dap4"; 111*7298b305SMisha Komarovskiy }; 112*7298b305SMisha Komarovskiy ddc { 113*7298b305SMisha Komarovskiy nvidia,pins = "ddc"; 114*7298b305SMisha Komarovskiy nvidia,function = "i2c2"; 115*7298b305SMisha Komarovskiy }; 116*7298b305SMisha Komarovskiy dta { 117*7298b305SMisha Komarovskiy nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; 118*7298b305SMisha Komarovskiy nvidia,function = "rsvd1"; 119*7298b305SMisha Komarovskiy }; 120*7298b305SMisha Komarovskiy dtf { 121*7298b305SMisha Komarovskiy nvidia,pins = "dtf"; 122*7298b305SMisha Komarovskiy nvidia,function = "i2c3"; 123*7298b305SMisha Komarovskiy }; 124*7298b305SMisha Komarovskiy gpu { 125*7298b305SMisha Komarovskiy nvidia,pins = "gpu", "sdb", "sdd"; 126*7298b305SMisha Komarovskiy nvidia,function = "pwm"; 127*7298b305SMisha Komarovskiy }; 128*7298b305SMisha Komarovskiy gpu7 { 129*7298b305SMisha Komarovskiy nvidia,pins = "gpu7"; 130*7298b305SMisha Komarovskiy nvidia,function = "rtck"; 131*7298b305SMisha Komarovskiy }; 132*7298b305SMisha Komarovskiy gpv { 133*7298b305SMisha Komarovskiy nvidia,pins = "gpv", "slxa", "slxk"; 134*7298b305SMisha Komarovskiy nvidia,function = "pcie"; 135*7298b305SMisha Komarovskiy }; 136*7298b305SMisha Komarovskiy hdint { 137*7298b305SMisha Komarovskiy nvidia,pins = "hdint", "pta"; 138*7298b305SMisha Komarovskiy nvidia,function = "hdmi"; 139*7298b305SMisha Komarovskiy }; 140*7298b305SMisha Komarovskiy i2cp { 141*7298b305SMisha Komarovskiy nvidia,pins = "i2cp"; 142*7298b305SMisha Komarovskiy nvidia,function = "i2cp"; 143*7298b305SMisha Komarovskiy }; 144*7298b305SMisha Komarovskiy irrx { 145*7298b305SMisha Komarovskiy nvidia,pins = "irrx", "irtx"; 146*7298b305SMisha Komarovskiy nvidia,function = "uarta"; 147*7298b305SMisha Komarovskiy }; 148*7298b305SMisha Komarovskiy kbca { 149*7298b305SMisha Komarovskiy nvidia,pins = "kbca", "kbcc", "kbce", "kbcf"; 150*7298b305SMisha Komarovskiy nvidia,function = "kbc"; 151*7298b305SMisha Komarovskiy }; 152*7298b305SMisha Komarovskiy kbcb { 153*7298b305SMisha Komarovskiy nvidia,pins = "kbcb", "kbcd"; 154*7298b305SMisha Komarovskiy nvidia,function = "sdio2"; 155*7298b305SMisha Komarovskiy }; 156*7298b305SMisha Komarovskiy lcsn { 157*7298b305SMisha Komarovskiy nvidia,pins = "lcsn", "ld0", "ld1", "ld2", 158*7298b305SMisha Komarovskiy "ld3", "ld4", "ld5", "ld6", "ld7", 159*7298b305SMisha Komarovskiy "ld8", "ld9", "ld10", "ld11", "ld12", 160*7298b305SMisha Komarovskiy "ld13", "ld14", "ld15", "ld16", "ld17", 161*7298b305SMisha Komarovskiy "ldc", "ldi", "lhp0", "lhp1", "lhp2", 162*7298b305SMisha Komarovskiy "lhs", "lm0", "lm1", "lpp", "lpw0", 163*7298b305SMisha Komarovskiy "lpw1", "lpw2", "lsc0", "lsc1", "lsck", 164*7298b305SMisha Komarovskiy "lsda", "lsdi", "lspi", "lvp0", "lvp1", 165*7298b305SMisha Komarovskiy "lvs"; 166*7298b305SMisha Komarovskiy nvidia,function = "displaya"; 167*7298b305SMisha Komarovskiy }; 168*7298b305SMisha Komarovskiy owc { 169*7298b305SMisha Komarovskiy nvidia,pins = "owc"; 170*7298b305SMisha Komarovskiy nvidia,function = "owr"; 171*7298b305SMisha Komarovskiy }; 172*7298b305SMisha Komarovskiy pmc { 173*7298b305SMisha Komarovskiy nvidia,pins = "pmc"; 174*7298b305SMisha Komarovskiy nvidia,function = "pwr_on"; 175*7298b305SMisha Komarovskiy }; 176*7298b305SMisha Komarovskiy rm { 177*7298b305SMisha Komarovskiy nvidia,pins = "rm"; 178*7298b305SMisha Komarovskiy nvidia,function = "i2c1"; 179*7298b305SMisha Komarovskiy }; 180*7298b305SMisha Komarovskiy sdc { 181*7298b305SMisha Komarovskiy nvidia,pins = "sdc"; 182*7298b305SMisha Komarovskiy nvidia,function = "twc"; 183*7298b305SMisha Komarovskiy }; 184*7298b305SMisha Komarovskiy sdio1 { 185*7298b305SMisha Komarovskiy nvidia,pins = "sdio1"; 186*7298b305SMisha Komarovskiy nvidia,function = "sdio1"; 187*7298b305SMisha Komarovskiy }; 188*7298b305SMisha Komarovskiy slxc { 189*7298b305SMisha Komarovskiy nvidia,pins = "slxc", "slxd"; 190*7298b305SMisha Komarovskiy nvidia,function = "spi4"; 191*7298b305SMisha Komarovskiy }; 192*7298b305SMisha Komarovskiy spdi { 193*7298b305SMisha Komarovskiy nvidia,pins = "spdi", "spdo"; 194*7298b305SMisha Komarovskiy nvidia,function = "rsvd2"; 195*7298b305SMisha Komarovskiy }; 196*7298b305SMisha Komarovskiy spif { 197*7298b305SMisha Komarovskiy nvidia,pins = "spif", "uac"; 198*7298b305SMisha Komarovskiy nvidia,function = "rsvd4"; 199*7298b305SMisha Komarovskiy }; 200*7298b305SMisha Komarovskiy spig { 201*7298b305SMisha Komarovskiy nvidia,pins = "spig", "spih"; 202*7298b305SMisha Komarovskiy nvidia,function = "spi2_alt"; 203*7298b305SMisha Komarovskiy }; 204*7298b305SMisha Komarovskiy uaa { 205*7298b305SMisha Komarovskiy nvidia,pins = "uaa", "uab", "uda"; 206*7298b305SMisha Komarovskiy nvidia,function = "ulpi"; 207*7298b305SMisha Komarovskiy }; 208*7298b305SMisha Komarovskiy uad { 209*7298b305SMisha Komarovskiy nvidia,pins = "uad"; 210*7298b305SMisha Komarovskiy nvidia,function = "spdif"; 211*7298b305SMisha Komarovskiy }; 212*7298b305SMisha Komarovskiy uca { 213*7298b305SMisha Komarovskiy nvidia,pins = "uca", "ucb"; 214*7298b305SMisha Komarovskiy nvidia,function = "uartc"; 215*7298b305SMisha Komarovskiy }; 216*7298b305SMisha Komarovskiy conf_ata { 217*7298b305SMisha Komarovskiy nvidia,pins = "ata", "atb", "atc", "atd", "ate", 218*7298b305SMisha Komarovskiy "cdev1", "cdev2", "dap1", "dap2", "dtf", 219*7298b305SMisha Komarovskiy "gma", "gmb", "gmc", "gmd", "gme", 220*7298b305SMisha Komarovskiy "gpu", "gpu7", "gpv", "i2cp", "pta", 221*7298b305SMisha Komarovskiy "rm", "sdio1", "slxk", "spdo", "uac", 222*7298b305SMisha Komarovskiy "uda"; 223*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_NONE>; 224*7298b305SMisha Komarovskiy nvidia,tristate = <TEGRA_PIN_DISABLE>; 225*7298b305SMisha Komarovskiy }; 226*7298b305SMisha Komarovskiy conf_ck32 { 227*7298b305SMisha Komarovskiy nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 228*7298b305SMisha Komarovskiy "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 229*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_NONE>; 230*7298b305SMisha Komarovskiy }; 231*7298b305SMisha Komarovskiy conf_crtp { 232*7298b305SMisha Komarovskiy nvidia,pins = "crtp", "dap3", "dap4", "dtb", 233*7298b305SMisha Komarovskiy "dtc", "dte", "slxa", "slxc", "slxd", 234*7298b305SMisha Komarovskiy "spdi"; 235*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_NONE>; 236*7298b305SMisha Komarovskiy nvidia,tristate = <TEGRA_PIN_ENABLE>; 237*7298b305SMisha Komarovskiy }; 238*7298b305SMisha Komarovskiy conf_csus { 239*7298b305SMisha Komarovskiy nvidia,pins = "csus", "spia", "spib", "spid", 240*7298b305SMisha Komarovskiy "spif"; 241*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 242*7298b305SMisha Komarovskiy nvidia,tristate = <TEGRA_PIN_ENABLE>; 243*7298b305SMisha Komarovskiy }; 244*7298b305SMisha Komarovskiy conf_ddc { 245*7298b305SMisha Komarovskiy nvidia,pins = "ddc", "irrx", "irtx", "kbca", 246*7298b305SMisha Komarovskiy "kbcb", "kbcc", "kbcd", "kbce", "kbcf", 247*7298b305SMisha Komarovskiy "spic", "spig", "uaa", "uab"; 248*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_UP>; 249*7298b305SMisha Komarovskiy nvidia,tristate = <TEGRA_PIN_DISABLE>; 250*7298b305SMisha Komarovskiy }; 251*7298b305SMisha Komarovskiy conf_dta { 252*7298b305SMisha Komarovskiy nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd", 253*7298b305SMisha Komarovskiy "spie", "spih", "uad", "uca", "ucb"; 254*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_UP>; 255*7298b305SMisha Komarovskiy nvidia,tristate = <TEGRA_PIN_ENABLE>; 256*7298b305SMisha Komarovskiy }; 257*7298b305SMisha Komarovskiy conf_hdint { 258*7298b305SMisha Komarovskiy nvidia,pins = "hdint", "ld0", "ld1", "ld2", 259*7298b305SMisha Komarovskiy "ld3", "ld4", "ld5", "ld6", "ld7", 260*7298b305SMisha Komarovskiy "ld8", "ld9", "ld10", "ld11", "ld12", 261*7298b305SMisha Komarovskiy "ld13", "ld14", "ld15", "ld16", "ld17", 262*7298b305SMisha Komarovskiy "ldc", "ldi", "lhs", "lsc0", "lspi", 263*7298b305SMisha Komarovskiy "lvs", "pmc"; 264*7298b305SMisha Komarovskiy nvidia,tristate = <TEGRA_PIN_DISABLE>; 265*7298b305SMisha Komarovskiy }; 266*7298b305SMisha Komarovskiy conf_lc { 267*7298b305SMisha Komarovskiy nvidia,pins = "lc", "ls"; 268*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_UP>; 269*7298b305SMisha Komarovskiy }; 270*7298b305SMisha Komarovskiy conf_lcsn { 271*7298b305SMisha Komarovskiy nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2", 272*7298b305SMisha Komarovskiy "lm0", "lm1", "lpp", "lpw0", "lpw1", 273*7298b305SMisha Komarovskiy "lpw2", "lsc1", "lsck", "lsda", "lsdi", 274*7298b305SMisha Komarovskiy "lvp0", "lvp1", "sdb"; 275*7298b305SMisha Komarovskiy nvidia,tristate = <TEGRA_PIN_ENABLE>; 276*7298b305SMisha Komarovskiy }; 277*7298b305SMisha Komarovskiy conf_ld17_0 { 278*7298b305SMisha Komarovskiy nvidia,pins = "ld17_0", "ld19_18", "ld21_20", 279*7298b305SMisha Komarovskiy "ld23_22"; 280*7298b305SMisha Komarovskiy nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 281*7298b305SMisha Komarovskiy }; 282*7298b305SMisha Komarovskiy }; 283*7298b305SMisha Komarovskiy }; 284*7298b305SMisha Komarovskiy 285*7298b305SMisha Komarovskiy i2s@70002800 { 286*7298b305SMisha Komarovskiy status = "okay"; 287*7298b305SMisha Komarovskiy }; 2885ab502cbSMasahiro Yamada 2895ab502cbSMasahiro Yamada serial@70006000 { 290*7298b305SMisha Komarovskiy status = "okay"; 291*7298b305SMisha Komarovskiy }; 292*7298b305SMisha Komarovskiy 293*7298b305SMisha Komarovskiy serial@70006200 { 294*7298b305SMisha Komarovskiy status = "okay"; 295*7298b305SMisha Komarovskiy }; 296*7298b305SMisha Komarovskiy 297*7298b305SMisha Komarovskiy pwm: pwm@7000a000 { 298*7298b305SMisha Komarovskiy status = "okay"; 299*7298b305SMisha Komarovskiy }; 300*7298b305SMisha Komarovskiy 301*7298b305SMisha Komarovskiy lvds_ddc: i2c@7000c000 { 302*7298b305SMisha Komarovskiy status = "okay"; 303*7298b305SMisha Komarovskiy clock-frequency = <400000>; 304*7298b305SMisha Komarovskiy 305*7298b305SMisha Komarovskiy alc5632: alc5632@1e { 306*7298b305SMisha Komarovskiy compatible = "realtek,alc5632"; 307*7298b305SMisha Komarovskiy reg = <0x1e>; 308*7298b305SMisha Komarovskiy gpio-controller; 309*7298b305SMisha Komarovskiy #gpio-cells = <2>; 310*7298b305SMisha Komarovskiy }; 311*7298b305SMisha Komarovskiy }; 312*7298b305SMisha Komarovskiy 313*7298b305SMisha Komarovskiy hdmi_ddc: i2c@7000c400 { 314*7298b305SMisha Komarovskiy status = "okay"; 315*7298b305SMisha Komarovskiy clock-frequency = <100000>; 316*7298b305SMisha Komarovskiy }; 317*7298b305SMisha Komarovskiy 318*7298b305SMisha Komarovskiy nvec@7000c500 { 319*7298b305SMisha Komarovskiy compatible = "nvidia,nvec"; 320*7298b305SMisha Komarovskiy reg = <0x7000c500 0x100>; 321*7298b305SMisha Komarovskiy interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 322*7298b305SMisha Komarovskiy #address-cells = <1>; 323*7298b305SMisha Komarovskiy #size-cells = <0>; 324*7298b305SMisha Komarovskiy clock-frequency = <80000>; 325*7298b305SMisha Komarovskiy request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 326*7298b305SMisha Komarovskiy slave-addr = <138>; 327*7298b305SMisha Komarovskiy clocks = <&tegra_car TEGRA20_CLK_I2C3>, 328*7298b305SMisha Komarovskiy <&tegra_car TEGRA20_CLK_PLL_P_OUT3>; 329*7298b305SMisha Komarovskiy clock-names = "div-clk", "fast-clk"; 330*7298b305SMisha Komarovskiy resets = <&tegra_car 67>; 331*7298b305SMisha Komarovskiy reset-names = "i2c"; 332*7298b305SMisha Komarovskiy }; 333*7298b305SMisha Komarovskiy 334*7298b305SMisha Komarovskiy i2c@7000d000 { 335*7298b305SMisha Komarovskiy status = "okay"; 336*7298b305SMisha Komarovskiy clock-frequency = <400000>; 337*7298b305SMisha Komarovskiy 338*7298b305SMisha Komarovskiy pmic: tps6586x@34 { 339*7298b305SMisha Komarovskiy compatible = "ti,tps6586x"; 340*7298b305SMisha Komarovskiy reg = <0x34>; 341*7298b305SMisha Komarovskiy interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 342*7298b305SMisha Komarovskiy 343*7298b305SMisha Komarovskiy #gpio-cells = <2>; 344*7298b305SMisha Komarovskiy gpio-controller; 345*7298b305SMisha Komarovskiy 346*7298b305SMisha Komarovskiy sys-supply = <&p5valw_reg>; 347*7298b305SMisha Komarovskiy vin-sm0-supply = <&sys_reg>; 348*7298b305SMisha Komarovskiy vin-sm1-supply = <&sys_reg>; 349*7298b305SMisha Komarovskiy vin-sm2-supply = <&sys_reg>; 350*7298b305SMisha Komarovskiy vinldo01-supply = <&sm2_reg>; 351*7298b305SMisha Komarovskiy vinldo23-supply = <&sm2_reg>; 352*7298b305SMisha Komarovskiy vinldo4-supply = <&sm2_reg>; 353*7298b305SMisha Komarovskiy vinldo678-supply = <&sm2_reg>; 354*7298b305SMisha Komarovskiy vinldo9-supply = <&sm2_reg>; 355*7298b305SMisha Komarovskiy 356*7298b305SMisha Komarovskiy regulators { 357*7298b305SMisha Komarovskiy sys_reg: sys { 358*7298b305SMisha Komarovskiy regulator-name = "vdd_sys"; 359*7298b305SMisha Komarovskiy regulator-always-on; 360*7298b305SMisha Komarovskiy }; 361*7298b305SMisha Komarovskiy 362*7298b305SMisha Komarovskiy sm0 { 363*7298b305SMisha Komarovskiy regulator-name = "+1.2vs_sm0,vdd_core"; 364*7298b305SMisha Komarovskiy regulator-min-microvolt = <1200000>; 365*7298b305SMisha Komarovskiy regulator-max-microvolt = <1200000>; 366*7298b305SMisha Komarovskiy regulator-always-on; 367*7298b305SMisha Komarovskiy }; 368*7298b305SMisha Komarovskiy 369*7298b305SMisha Komarovskiy sm1 { 370*7298b305SMisha Komarovskiy regulator-name = "+1.0vs_sm1,vdd_cpu"; 371*7298b305SMisha Komarovskiy regulator-min-microvolt = <1000000>; 372*7298b305SMisha Komarovskiy regulator-max-microvolt = <1000000>; 373*7298b305SMisha Komarovskiy regulator-always-on; 374*7298b305SMisha Komarovskiy }; 375*7298b305SMisha Komarovskiy 376*7298b305SMisha Komarovskiy sm2_reg: sm2 { 377*7298b305SMisha Komarovskiy regulator-name = "+3.7vs_sm2,vin_ldo*"; 378*7298b305SMisha Komarovskiy regulator-min-microvolt = <3700000>; 379*7298b305SMisha Komarovskiy regulator-max-microvolt = <3700000>; 380*7298b305SMisha Komarovskiy regulator-always-on; 381*7298b305SMisha Komarovskiy }; 382*7298b305SMisha Komarovskiy 383*7298b305SMisha Komarovskiy /* LDO0 is not connected to anything */ 384*7298b305SMisha Komarovskiy 385*7298b305SMisha Komarovskiy ldo1 { 386*7298b305SMisha Komarovskiy regulator-name = "+1.1vs_ldo1,avdd_pll*"; 387*7298b305SMisha Komarovskiy regulator-min-microvolt = <1100000>; 388*7298b305SMisha Komarovskiy regulator-max-microvolt = <1100000>; 389*7298b305SMisha Komarovskiy regulator-always-on; 390*7298b305SMisha Komarovskiy }; 391*7298b305SMisha Komarovskiy 392*7298b305SMisha Komarovskiy ldo2 { 393*7298b305SMisha Komarovskiy regulator-name = "+1.2vs_ldo2,vdd_rtc"; 394*7298b305SMisha Komarovskiy regulator-min-microvolt = <1200000>; 395*7298b305SMisha Komarovskiy regulator-max-microvolt = <1200000>; 396*7298b305SMisha Komarovskiy }; 397*7298b305SMisha Komarovskiy 398*7298b305SMisha Komarovskiy ldo3 { 399*7298b305SMisha Komarovskiy regulator-name = "+3.3vs_ldo3,avdd_usb*"; 400*7298b305SMisha Komarovskiy regulator-min-microvolt = <3300000>; 401*7298b305SMisha Komarovskiy regulator-max-microvolt = <3300000>; 402*7298b305SMisha Komarovskiy regulator-always-on; 403*7298b305SMisha Komarovskiy }; 404*7298b305SMisha Komarovskiy 405*7298b305SMisha Komarovskiy ldo4 { 406*7298b305SMisha Komarovskiy regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys"; 407*7298b305SMisha Komarovskiy regulator-min-microvolt = <1800000>; 408*7298b305SMisha Komarovskiy regulator-max-microvolt = <1800000>; 409*7298b305SMisha Komarovskiy regulator-always-on; 410*7298b305SMisha Komarovskiy }; 411*7298b305SMisha Komarovskiy 412*7298b305SMisha Komarovskiy ldo5 { 413*7298b305SMisha Komarovskiy regulator-name = "+2.85vs_ldo5,vcore_mmc"; 414*7298b305SMisha Komarovskiy regulator-min-microvolt = <2850000>; 415*7298b305SMisha Komarovskiy regulator-max-microvolt = <2850000>; 416*7298b305SMisha Komarovskiy regulator-always-on; 417*7298b305SMisha Komarovskiy }; 418*7298b305SMisha Komarovskiy 419*7298b305SMisha Komarovskiy ldo6 { 420*7298b305SMisha Komarovskiy /* 421*7298b305SMisha Komarovskiy * Research indicates this should be 422*7298b305SMisha Komarovskiy * 1.8v; other boards that use this 423*7298b305SMisha Komarovskiy * rail for the same purpose need it 424*7298b305SMisha Komarovskiy * set to 1.8v. The schematic signal 425*7298b305SMisha Komarovskiy * name is incorrect; perhaps copied 426*7298b305SMisha Komarovskiy * from an incorrect NVIDIA reference. 427*7298b305SMisha Komarovskiy */ 428*7298b305SMisha Komarovskiy regulator-name = "+2.85vs_ldo6,avdd_vdac"; 429*7298b305SMisha Komarovskiy regulator-min-microvolt = <1800000>; 430*7298b305SMisha Komarovskiy regulator-max-microvolt = <1800000>; 431*7298b305SMisha Komarovskiy }; 432*7298b305SMisha Komarovskiy 433*7298b305SMisha Komarovskiy hdmi_vdd_reg: ldo7 { 434*7298b305SMisha Komarovskiy regulator-name = "+3.3vs_ldo7,avdd_hdmi"; 435*7298b305SMisha Komarovskiy regulator-min-microvolt = <3300000>; 436*7298b305SMisha Komarovskiy regulator-max-microvolt = <3300000>; 437*7298b305SMisha Komarovskiy }; 438*7298b305SMisha Komarovskiy 439*7298b305SMisha Komarovskiy hdmi_pll_reg: ldo8 { 440*7298b305SMisha Komarovskiy regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; 441*7298b305SMisha Komarovskiy regulator-min-microvolt = <1800000>; 442*7298b305SMisha Komarovskiy regulator-max-microvolt = <1800000>; 443*7298b305SMisha Komarovskiy }; 444*7298b305SMisha Komarovskiy 445*7298b305SMisha Komarovskiy ldo9 { 446*7298b305SMisha Komarovskiy regulator-name = "+2.85vs_ldo9,vdd_ddr_rx"; 447*7298b305SMisha Komarovskiy regulator-min-microvolt = <2850000>; 448*7298b305SMisha Komarovskiy regulator-max-microvolt = <2850000>; 449*7298b305SMisha Komarovskiy regulator-always-on; 450*7298b305SMisha Komarovskiy }; 451*7298b305SMisha Komarovskiy 452*7298b305SMisha Komarovskiy ldo_rtc { 453*7298b305SMisha Komarovskiy regulator-name = "+3.3vs_rtc"; 454*7298b305SMisha Komarovskiy regulator-min-microvolt = <3300000>; 455*7298b305SMisha Komarovskiy regulator-max-microvolt = <3300000>; 456*7298b305SMisha Komarovskiy regulator-always-on; 457*7298b305SMisha Komarovskiy }; 458*7298b305SMisha Komarovskiy }; 459*7298b305SMisha Komarovskiy }; 460*7298b305SMisha Komarovskiy 461*7298b305SMisha Komarovskiy adt7461@4c { 462*7298b305SMisha Komarovskiy compatible = "adi,adt7461"; 463*7298b305SMisha Komarovskiy reg = <0x4c>; 464*7298b305SMisha Komarovskiy }; 465*7298b305SMisha Komarovskiy }; 466*7298b305SMisha Komarovskiy 467*7298b305SMisha Komarovskiy pmc@7000e400 { 468*7298b305SMisha Komarovskiy nvidia,invert-interrupt; 469*7298b305SMisha Komarovskiy nvidia,suspend-mode = <1>; 470*7298b305SMisha Komarovskiy nvidia,cpu-pwr-good-time = <2000>; 471*7298b305SMisha Komarovskiy nvidia,cpu-pwr-off-time = <0>; 472*7298b305SMisha Komarovskiy nvidia,core-pwr-good-time = <3845 3845>; 473*7298b305SMisha Komarovskiy nvidia,core-pwr-off-time = <0>; 474*7298b305SMisha Komarovskiy nvidia,sys-clock-req-active-high; 475*7298b305SMisha Komarovskiy }; 476*7298b305SMisha Komarovskiy 477*7298b305SMisha Komarovskiy usb@c5000000 { 478*7298b305SMisha Komarovskiy status = "okay"; 479*7298b305SMisha Komarovskiy }; 480*7298b305SMisha Komarovskiy 481*7298b305SMisha Komarovskiy usb-phy@c5000000 { 482*7298b305SMisha Komarovskiy status = "okay"; 483*7298b305SMisha Komarovskiy }; 484*7298b305SMisha Komarovskiy 485*7298b305SMisha Komarovskiy usb@c5004000 { 486*7298b305SMisha Komarovskiy status = "okay"; 487*7298b305SMisha Komarovskiy nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) 488*7298b305SMisha Komarovskiy GPIO_ACTIVE_LOW>; 489*7298b305SMisha Komarovskiy }; 490*7298b305SMisha Komarovskiy 491*7298b305SMisha Komarovskiy usb-phy@c5004000 { 492*7298b305SMisha Komarovskiy status = "okay"; 493*7298b305SMisha Komarovskiy nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) 494*7298b305SMisha Komarovskiy GPIO_ACTIVE_LOW>; 4955ab502cbSMasahiro Yamada }; 4965ab502cbSMasahiro Yamada 497ee7d755aSSimon Glass usb@c5008000 { 498ee7d755aSSimon Glass status = "okay"; 4995ab502cbSMasahiro Yamada }; 5005ab502cbSMasahiro Yamada 501*7298b305SMisha Komarovskiy usb-phy@c5008000 { 502*7298b305SMisha Komarovskiy status = "okay"; 503*7298b305SMisha Komarovskiy }; 504*7298b305SMisha Komarovskiy 5055ab502cbSMasahiro Yamada sdhci@c8000000 { 5065ab502cbSMasahiro Yamada status = "okay"; 5072b2b50bcSSimon Glass cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>; 5082b2b50bcSSimon Glass wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 5092b2b50bcSSimon Glass power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 5105ab502cbSMasahiro Yamada bus-width = <4>; 5115ab502cbSMasahiro Yamada }; 5125ab502cbSMasahiro Yamada 5135ab502cbSMasahiro Yamada sdhci@c8000600 { 5145ab502cbSMasahiro Yamada status = "okay"; 5155ab502cbSMasahiro Yamada bus-width = <8>; 5169a06a1a3STom Warren non-removable; 5175ab502cbSMasahiro Yamada }; 5185ab502cbSMasahiro Yamada 519*7298b305SMisha Komarovskiy backlight: backlight { 520*7298b305SMisha Komarovskiy compatible = "pwm-backlight"; 521*7298b305SMisha Komarovskiy 522*7298b305SMisha Komarovskiy enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>; 523*7298b305SMisha Komarovskiy power-supply = <&vdd_bl_reg>; 524*7298b305SMisha Komarovskiy pwms = <&pwm 0 5000000>; 525*7298b305SMisha Komarovskiy 526*7298b305SMisha Komarovskiy brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>; 527*7298b305SMisha Komarovskiy default-brightness-level = <10>; 528*7298b305SMisha Komarovskiy 529*7298b305SMisha Komarovskiy backlight-boot-off; 530*7298b305SMisha Komarovskiy }; 531*7298b305SMisha Komarovskiy 532ee7d755aSSimon Glass clocks { 533ee7d755aSSimon Glass compatible = "simple-bus"; 534ee7d755aSSimon Glass #address-cells = <1>; 535ee7d755aSSimon Glass #size-cells = <0>; 536ee7d755aSSimon Glass 537ee7d755aSSimon Glass clk32k_in: clock@0 { 538ee7d755aSSimon Glass compatible = "fixed-clock"; 539ee7d755aSSimon Glass reg = <0>; 540ee7d755aSSimon Glass #clock-cells = <0>; 541ee7d755aSSimon Glass clock-frequency = <32768>; 542ee7d755aSSimon Glass }; 543ee7d755aSSimon Glass }; 544ee7d755aSSimon Glass 545*7298b305SMisha Komarovskiy gpio-keys { 546*7298b305SMisha Komarovskiy compatible = "gpio-keys"; 547*7298b305SMisha Komarovskiy 548*7298b305SMisha Komarovskiy power { 549*7298b305SMisha Komarovskiy label = "Power"; 550*7298b305SMisha Komarovskiy gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>; 551*7298b305SMisha Komarovskiy linux,code = <KEY_POWER>; 552*7298b305SMisha Komarovskiy wakeup-source; 553*7298b305SMisha Komarovskiy }; 55491c08afeSSimon Glass }; 55591c08afeSSimon Glass 556*7298b305SMisha Komarovskiy gpio-leds { 557*7298b305SMisha Komarovskiy compatible = "gpio-leds"; 558*7298b305SMisha Komarovskiy 559*7298b305SMisha Komarovskiy wifi { 560*7298b305SMisha Komarovskiy label = "wifi-led"; 561*7298b305SMisha Komarovskiy gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>; 562*7298b305SMisha Komarovskiy linux,default-trigger = "rfkill0"; 563*7298b305SMisha Komarovskiy }; 564*7298b305SMisha Komarovskiy }; 565*7298b305SMisha Komarovskiy 566*7298b305SMisha Komarovskiy panel: panel { 567*7298b305SMisha Komarovskiy compatible = "samsung,ltn101nt05", "simple-panel"; 568*7298b305SMisha Komarovskiy 569*7298b305SMisha Komarovskiy ddc-i2c-bus = <&lvds_ddc>; 570*7298b305SMisha Komarovskiy power-supply = <&vdd_pnl_reg>; 571*7298b305SMisha Komarovskiy enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>; 572*7298b305SMisha Komarovskiy 573*7298b305SMisha Komarovskiy backlight = <&backlight>; 574*7298b305SMisha Komarovskiy }; 575*7298b305SMisha Komarovskiy 576*7298b305SMisha Komarovskiy regulators { 577*7298b305SMisha Komarovskiy compatible = "simple-bus"; 578*7298b305SMisha Komarovskiy #address-cells = <1>; 579*7298b305SMisha Komarovskiy #size-cells = <0>; 580*7298b305SMisha Komarovskiy 581*7298b305SMisha Komarovskiy p5valw_reg: regulator@0 { 582*7298b305SMisha Komarovskiy compatible = "regulator-fixed"; 583*7298b305SMisha Komarovskiy reg = <0>; 584*7298b305SMisha Komarovskiy regulator-name = "+5valw"; 585*7298b305SMisha Komarovskiy regulator-min-microvolt = <5000000>; 586*7298b305SMisha Komarovskiy regulator-max-microvolt = <5000000>; 587*7298b305SMisha Komarovskiy regulator-always-on; 588*7298b305SMisha Komarovskiy }; 589*7298b305SMisha Komarovskiy 590*7298b305SMisha Komarovskiy vdd_pnl_reg: regulator@1 { 591*7298b305SMisha Komarovskiy compatible = "regulator-fixed"; 592*7298b305SMisha Komarovskiy reg = <1>; 593*7298b305SMisha Komarovskiy regulator-name = "+3VS,vdd_pnl"; 594*7298b305SMisha Komarovskiy regulator-min-microvolt = <3300000>; 595*7298b305SMisha Komarovskiy regulator-max-microvolt = <3300000>; 596*7298b305SMisha Komarovskiy gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>; 597*7298b305SMisha Komarovskiy enable-active-high; 598*7298b305SMisha Komarovskiy }; 599*7298b305SMisha Komarovskiy 600*7298b305SMisha Komarovskiy vdd_bl_reg: regulator@2 { 601*7298b305SMisha Komarovskiy compatible = "regulator-fixed"; 602*7298b305SMisha Komarovskiy reg = <2>; 603*7298b305SMisha Komarovskiy regulator-name = "vdd_bl"; 604*7298b305SMisha Komarovskiy regulator-min-microvolt = <2800000>; 605*7298b305SMisha Komarovskiy regulator-max-microvolt = <2800000>; 606*7298b305SMisha Komarovskiy gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>; 607*7298b305SMisha Komarovskiy enable-active-high; 608*7298b305SMisha Komarovskiy }; 609*7298b305SMisha Komarovskiy }; 610*7298b305SMisha Komarovskiy 611*7298b305SMisha Komarovskiy sound { 612*7298b305SMisha Komarovskiy compatible = "nvidia,tegra-audio-alc5632-paz00", 613*7298b305SMisha Komarovskiy "nvidia,tegra-audio-alc5632"; 614*7298b305SMisha Komarovskiy 615*7298b305SMisha Komarovskiy nvidia,model = "Compal PAZ00"; 616*7298b305SMisha Komarovskiy 617*7298b305SMisha Komarovskiy nvidia,audio-routing = 618*7298b305SMisha Komarovskiy "Int Spk", "SPKOUT", 619*7298b305SMisha Komarovskiy "Int Spk", "SPKOUTN", 620*7298b305SMisha Komarovskiy "Headset Mic", "MICBIAS1", 621*7298b305SMisha Komarovskiy "MIC1", "Headset Mic", 622*7298b305SMisha Komarovskiy "Headset Stereophone", "HPR", 623*7298b305SMisha Komarovskiy "Headset Stereophone", "HPL", 624*7298b305SMisha Komarovskiy "DMICDAT", "Digital Mic"; 625*7298b305SMisha Komarovskiy 626*7298b305SMisha Komarovskiy nvidia,audio-codec = <&alc5632>; 627*7298b305SMisha Komarovskiy nvidia,i2s-controller = <&tegra_i2s1>; 628*7298b305SMisha Komarovskiy nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) 6292b2b50bcSSimon Glass GPIO_ACTIVE_HIGH>; 630*7298b305SMisha Komarovskiy 631*7298b305SMisha Komarovskiy clocks = <&tegra_car TEGRA20_CLK_PLL_A>, 632*7298b305SMisha Komarovskiy <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, 633*7298b305SMisha Komarovskiy <&tegra_car TEGRA20_CLK_CDEV1>; 634*7298b305SMisha Komarovskiy clock-names = "pll_a", "pll_a_out0", "mclk"; 6355ab502cbSMasahiro Yamada }; 6365ab502cbSMasahiro Yamada}; 637