xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/pmu_rk3188.h (revision f9515756b6d76cde99b385dda905dfb20d31ea48)
1*ca06a230SHeiko Stübner /*
2*ca06a230SHeiko Stübner  * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
3*ca06a230SHeiko Stübner  *
4*ca06a230SHeiko Stübner  * SPDX-License-Identifier:	GPL-2.0+
5*ca06a230SHeiko Stübner  */
6*ca06a230SHeiko Stübner 
7*ca06a230SHeiko Stübner #ifndef _ASM_ARCH_PMU_RK3188_H
8*ca06a230SHeiko Stübner #define _ASM_ARCH_PMU_RK3188_H
9*ca06a230SHeiko Stübner 
10*ca06a230SHeiko Stübner struct rk3188_pmu {
11*ca06a230SHeiko Stübner 	u32 wakeup_cfg[2];
12*ca06a230SHeiko Stübner 	u32 pwrdn_con;
13*ca06a230SHeiko Stübner 	u32 pwrdn_st;
14*ca06a230SHeiko Stübner 
15*ca06a230SHeiko Stübner 	u32 int_con;
16*ca06a230SHeiko Stübner 	u32 int_st;
17*ca06a230SHeiko Stübner 	u32 misc_con;
18*ca06a230SHeiko Stübner 
19*ca06a230SHeiko Stübner 	u32 osc_cnt;
20*ca06a230SHeiko Stübner 	u32 pll_cnt;
21*ca06a230SHeiko Stübner 	u32 pmu_cnt;
22*ca06a230SHeiko Stübner 	u32 ddrio_pwron_cnt;
23*ca06a230SHeiko Stübner 	u32 wakeup_rst_clr_cnt;
24*ca06a230SHeiko Stübner 	u32 scu_pwrdwn_cnt;
25*ca06a230SHeiko Stübner 	u32 scu_pwrup_cnt;
26*ca06a230SHeiko Stübner 	u32 misc_con1;
27*ca06a230SHeiko Stübner 	u32 gpio0_con;
28*ca06a230SHeiko Stübner 
29*ca06a230SHeiko Stübner 	u32 sys_reg[4];
30*ca06a230SHeiko Stübner 	u32 reserved0[4];
31*ca06a230SHeiko Stübner 	u32 stop_int_dly;
32*ca06a230SHeiko Stübner 	u32 gpio0_p[2];
33*ca06a230SHeiko Stübner };
34*ca06a230SHeiko Stübner check_member(rk3188_pmu, gpio0_p[1], 0x0068);
35*ca06a230SHeiko Stübner 
36*ca06a230SHeiko Stübner #endif
37