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Searched refs:regs (Results 1 – 25 of 486) sorted by relevance

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/rk3399_rockchip-uboot/board/cavium/thunderx/
H A Datf.c23 struct pt_regs regs; in atf_read_mmc() local
24 regs.regs[0] = THUNDERX_MMC_READ; in atf_read_mmc()
25 regs.regs[1] = offset; in atf_read_mmc()
26 regs.regs[2] = size; in atf_read_mmc()
27 regs.regs[3] = (uintptr_t)buffer; in atf_read_mmc()
29 smc_call(&regs); in atf_read_mmc()
31 return regs.regs[0]; in atf_read_mmc()
36 struct pt_regs regs; in atf_read_nor() local
37 regs.regs[0] = THUNDERX_NOR_READ; in atf_read_nor()
38 regs.regs[1] = offset; in atf_read_nor()
[all …]
/rk3399_rockchip-uboot/arch/nds32/lib/
H A Dinterrupts.c71 void show_regs(struct pt_regs *regs) in show_regs() argument
78 regs->ipc, regs->sp, regs->lp, regs->gp, regs->fp); in show_regs()
80 regs->d1hi, regs->d1lo, regs->d0hi, regs->d0lo); in show_regs()
82 regs->p1, regs->p0, regs->r[25], regs->r[24]); in show_regs()
84 regs->r[23], regs->r[22], regs->r[21], regs->r[20]); in show_regs()
86 regs->r[19], regs->r[18], regs->r[17], regs->r[16]); in show_regs()
88 regs->r[15], regs->r[14], regs->r[13], regs->r[12]); in show_regs()
90 regs->r[11], regs->r[10], regs->r[9], regs->r[8]); in show_regs()
92 regs->r[7], regs->r[6], regs->r[5], regs->r[4]); in show_regs()
94 regs->r[3], regs->r[2], regs->r[1], regs->r[0]); in show_regs()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xx/
H A Dtraps.c55 static void show_regs(struct pt_regs *regs) in show_regs() argument
60 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
62 regs->msr, regs->msr & MSR_EE ? 1 : 0, in show_regs()
63 regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0, in show_regs()
64 regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0, in show_regs()
65 regs->msr & MSR_DR ? 1 : 0); in show_regs()
72 printf("%08lX ", regs->gpr[i]); in show_regs()
79 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
81 show_regs(regs); in _exception()
82 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/
H A Dtraps.c52 void show_regs(struct pt_regs *regs) in show_regs() argument
57 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
59 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, in show_regs()
60 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, in show_regs()
61 regs->msr&MSR_IR ? 1 : 0, in show_regs()
62 regs->msr&MSR_DR ? 1 : 0); in show_regs()
70 printf("%08lX ", regs->gpr[i]); in show_regs()
78 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
80 show_regs(regs); in _exception()
81 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
H A Dserdes.c48 void *regs = (void *)CONFIG_SYS_IMMR + offset; in fsl_setup_serdes() local
54 tmp = in_be32(regs + FSL_SRDSCR0_OFFS); in fsl_setup_serdes()
56 out_be32(regs + FSL_SRDSCR0_OFFS, tmp); in fsl_setup_serdes()
59 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
61 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
68 tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS); in fsl_setup_serdes()
70 out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); in fsl_setup_serdes()
73 out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp); in fsl_setup_serdes()
76 clrsetbits_be32(regs + FSL_SRDSCR0_OFFS, in fsl_setup_serdes()
81 tmp = in_be32(regs + FSL_SRDSCR1_OFFS); in fsl_setup_serdes()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/
H A Dtraps.c59 void show_regs(struct pt_regs *regs) in show_regs() argument
65 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
68 regs->msr, regs->msr & MSR_EE ? 1 : 0, in show_regs()
69 regs->msr & MSR_PR ? 1 : 0, regs->msr & MSR_FP ? 1 : 0, in show_regs()
70 regs->msr & MSR_ME ? 1 : 0, regs->msr & MSR_IR ? 1 : 0, in show_regs()
71 regs->msr & MSR_DR ? 1 : 0); in show_regs()
79 printf("%08lX ", regs->gpr[i]); in show_regs()
87 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
89 show_regs(regs); in _exception()
90 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/rk3399_rockchip-uboot/arch/arc/lib/
H A Dinterrupts.c62 void show_regs(struct pt_regs *regs) in show_regs() argument
64 printf("ECR:\t0x%08lx\n", regs->ecr); in show_regs()
66 regs->ret, regs->blink, regs->status32); in show_regs()
67 printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25); in show_regs()
68 printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta, in show_regs()
69 regs->sp, regs->fp); in show_regs()
70 printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start, in show_regs()
71 regs->lp_end, regs->lp_count); in show_regs()
73 print_reg_file(&(regs->r0), 0); in show_regs()
76 void bad_mode(struct pt_regs *regs) in bad_mode() argument
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/
H A Dtraps.c88 void show_regs(struct pt_regs *regs) in show_regs() argument
93 regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar); in show_regs()
95 regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0, in show_regs()
96 regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0, in show_regs()
97 regs->msr&MSR_IR ? 1 : 0, in show_regs()
98 regs->msr&MSR_DR ? 1 : 0); in show_regs()
107 printf("%08lX ", regs->gpr[i]); in show_regs()
116 static void _exception(int signr, struct pt_regs *regs) in _exception() argument
118 show_regs(regs); in _exception()
119 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-meson/
H A Dsm.c23 struct pt_regs regs; in meson_init_shmem() local
28 regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE; in meson_init_shmem()
29 smc_call(&regs); in meson_init_shmem()
30 shmem_input = (void *)regs.regs[0]; in meson_init_shmem()
32 regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE; in meson_init_shmem()
33 smc_call(&regs); in meson_init_shmem()
34 shmem_output = (void *)regs.regs[0]; in meson_init_shmem()
41 struct pt_regs regs; in meson_sm_read_efuse() local
45 regs.regs[0] = FN_EFUSE_READ; in meson_sm_read_efuse()
46 regs.regs[1] = offset; in meson_sm_read_efuse()
[all …]
/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk_mipi.c53 static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 val) in rk_mipi_dsi_write() argument
59 uintptr_t addr = (reg >> ADDR_SHIFT) + regs; in rk_mipi_dsi_write()
85 uintptr_t regs = priv->regs; in rk_mipi_dsi_enable() local
92 rk_mipi_dsi_write(regs, VID_HSA_TIME, timing->hsync_len.typ); in rk_mipi_dsi_enable()
93 rk_mipi_dsi_write(regs, VID_HBP_TIME, timing->hback_porch.typ); in rk_mipi_dsi_enable()
94 rk_mipi_dsi_write(regs, VID_HLINE_TIME, (timing->hsync_len.typ in rk_mipi_dsi_enable()
97 rk_mipi_dsi_write(regs, VID_VSA_LINES, timing->vsync_len.typ); in rk_mipi_dsi_enable()
98 rk_mipi_dsi_write(regs, VID_VBP_LINES, timing->vback_porch.typ); in rk_mipi_dsi_enable()
99 rk_mipi_dsi_write(regs, VID_VFP_LINES, timing->vfront_porch.typ); in rk_mipi_dsi_enable()
100 rk_mipi_dsi_write(regs, VID_ACTIVE_LINES, timing->vactive.typ); in rk_mipi_dsi_enable()
[all …]
H A Drk_edp.c40 struct rk3288_edp *regs; member
47 static void rk_edp_init_refclk(struct rk3288_edp *regs) in rk_edp_init_refclk() argument
49 writel(SEL_24M, &regs->analog_ctl_2); in rk_edp_init_refclk()
50 writel(REF_CLK_24M, &regs->pll_reg_1); in rk_edp_init_refclk()
53 V2L_CUR_SEL_1MA, &regs->pll_reg_2); in rk_edp_init_refclk()
57 &regs->pll_reg_3); in rk_edp_init_refclk()
61 &regs->pll_reg_5); in rk_edp_init_refclk()
63 writel(SSC_OFFSET | SSC_MODE | SSC_DEPTH, &regs->ssc_reg); in rk_edp_init_refclk()
67 &regs->tx_common); in rk_edp_init_refclk()
70 &regs->dp_aux); in rk_edp_init_refclk()
[all …]
/rk3399_rockchip-uboot/arch/mips/lib/
H A Dasm-offsets.c21 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines()
22 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines()
23 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines()
24 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines()
25 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines()
26 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines()
27 OFFSET(PT_R6, pt_regs, regs[6]); in output_ptreg_defines()
28 OFFSET(PT_R7, pt_regs, regs[7]); in output_ptreg_defines()
29 OFFSET(PT_R8, pt_regs, regs[8]); in output_ptreg_defines()
30 OFFSET(PT_R9, pt_regs, regs[9]); in output_ptreg_defines()
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/
H A Dfwcall.c38 : "+m" (args->regs[0]), "+m" (args->regs[1]), in hvc_call()
39 "+m" (args->regs[2]), "+m" (args->regs[3]) in hvc_call()
40 : "m" (args->regs[4]), "m" (args->regs[5]), in hvc_call()
41 "m" (args->regs[6]), "m" (args->regs[7]) in hvc_call()
71 : "+m" (args->regs[0]), "+m" (args->regs[1]), in smc_call()
72 "+m" (args->regs[2]), "+m" (args->regs[3]) in smc_call()
73 : "m" (args->regs[4]), "m" (args->regs[5]), in smc_call()
74 "m" (args->regs[6]) in smc_call()
90 struct pt_regs regs; in psci_system_reset() local
92 regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET; in psci_system_reset()
[all …]
/rk3399_rockchip-uboot/drivers/ddr/fsl/
H A Darm_ddr_gen3.c31 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, in fsl_ddr_set_memctl_regs() argument
67 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
68 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
71 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
72 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
73 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
76 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
77 ddr_out32(&ddr->cs1_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
78 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
81 ddr_out32(&ddr->cs2_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
[all …]
H A Dfsl_ddr_gen4.c49 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, in fsl_ddr_set_memctl_regs() argument
98 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
99 ddr_out32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
101 ddr_out32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl); in fsl_ddr_set_memctl_regs()
105 ddr_out32(&ddr->cs0_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
106 ddr_out32(&ddr->cs0_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
107 ddr_out32(&ddr->cs0_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
110 ddr_out32(&ddr->cs1_bnds, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
111 ddr_out32(&ddr->cs1_config, regs->cs[i].config); in fsl_ddr_set_memctl_regs()
112 ddr_out32(&ddr->cs1_config_2, regs->cs[i].config_2); in fsl_ddr_set_memctl_regs()
[all …]
H A Dmpc85xx_ddr_gen3.c25 void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, in fsl_ddr_set_memctl_regs() argument
70 if (regs->ddr_eor) in fsl_ddr_set_memctl_regs()
71 out_be32(&ddr->eor, regs->ddr_eor); in fsl_ddr_set_memctl_regs()
75 cs_sa = (regs->cs[i].bnds >> 16) & 0xfff; in fsl_ddr_set_memctl_regs()
76 cs_ea = regs->cs[i].bnds & 0xfff; in fsl_ddr_set_memctl_regs()
79 csn_bnds_backup = regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
80 csn_bnds_t = (unsigned int *) &regs->cs[i].bnds; in fsl_ddr_set_memctl_regs()
82 *csn_bnds_t = regs->cs[i].bnds + 0x01000000; in fsl_ddr_set_memctl_regs()
84 *csn_bnds_t = regs->cs[i].bnds + 0x01000100; in fsl_ddr_set_memctl_regs()
87 csn, csn_bnds_backup, regs->cs[i].bnds); in fsl_ddr_set_memctl_regs()
[all …]
/rk3399_rockchip-uboot/drivers/spmi/
H A Dspmi-sandbox.c62 struct sandbox_emul_fake_regs *regs; in sandbox_spmi_write() local
67 regs = priv->gpios[pid & 0x3].r; /* Last 3 bits of pid are gpio # */ in sandbox_spmi_write()
71 val &= regs[off].access_mask; in sandbox_spmi_write()
74 regs[0x8].value &= ~0x1; in sandbox_spmi_write()
75 regs[0x8].value |= val & 0x1; in sandbox_spmi_write()
79 if (regs[off].perms & EMUL_PERM_W) in sandbox_spmi_write()
80 regs[off].value = val & regs[off].access_mask; in sandbox_spmi_write()
88 struct sandbox_emul_fake_regs *regs; in sandbox_spmi_read() local
93 regs = priv->gpios[pid & 0x3].r; /* Last 3 bits of pid are gpio # */ in sandbox_spmi_read()
95 if (regs[0x46].value == 0) /* Block disabled */ in sandbox_spmi_read()
[all …]
/rk3399_rockchip-uboot/drivers/video/
H A Dbroadwell_igd.c24 u8 *regs; member
72 u8 *regs = priv->regs; in haswell_early_init() local
76 writel(0x00000020, regs + 0xa180); in haswell_early_init()
77 writel(0x00010001, regs + 0xa188); in haswell_early_init()
78 ret = poll32(regs + 0x130044, 1, 1); in haswell_early_init()
83 setbits_le32(regs + 0xa248, 0x00000016); in haswell_early_init()
86 writel(0x00070020, regs + 0xa000); in haswell_early_init()
89 clrsetbits_le32(regs + 0xa180, ~0xff3fffff, 0x15000000); in haswell_early_init()
92 writel(0x000003fd, regs + 0x9424); in haswell_early_init()
95 writel(0x00000080, regs + 0x9400); in haswell_early_init()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/lib/
H A Dkgdb.c80 kgdb_enter(struct pt_regs *regs, kgdb_data *kdp) in kgdb_enter() argument
87 if (regs->nip == (unsigned long)breakinst) { in kgdb_enter()
89 regs->nip += 4; in kgdb_enter()
91 regs->msr &= ~MSR_SE; in kgdb_enter()
94 kdp->sigval = computeSignal(regs->trap); in kgdb_enter()
98 kdp->regs[0].num = PC_REGNUM; in kgdb_enter()
99 kdp->regs[0].val = regs->nip; in kgdb_enter()
101 kdp->regs[1].num = SP_REGNUM; in kgdb_enter()
102 kdp->regs[1].val = regs->gpr[SP_REGNUM]; in kgdb_enter()
106 kgdb_exit(struct pt_regs *regs, kgdb_data *kdp) in kgdb_exit() argument
[all …]
/rk3399_rockchip-uboot/drivers/misc/
H A Dmxc_ocotp.c153 static void wait_busy(struct ocotp_regs *regs, unsigned int delay_us) in wait_busy() argument
155 while (readl(&regs->ctrl) & BM_CTRL_BUSY) in wait_busy()
159 static void clear_error(struct ocotp_regs *regs) in clear_error() argument
161 writel(BM_CTRL_ERROR, &regs->ctrl_clr); in clear_error()
164 static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word, in prepare_access() argument
167 *regs = (struct ocotp_regs *)OCOTP_BASE_ADDR; in prepare_access()
170 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 || in prepare_access()
178 word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 3) { in prepare_access()
186 wait_busy(*regs, 1); in prepare_access()
187 clear_error(*regs); in prepare_access()
[all …]
/rk3399_rockchip-uboot/arch/mips/include/asm/
H A Dptrace.h28 unsigned long regs[32]; member
47 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) in kernel_stack_pointer() argument
49 return regs->regs[31]; in kernel_stack_pointer()
57 static inline void instruction_pointer_set(struct pt_regs *regs, in instruction_pointer_set() argument
60 regs->cp0_epc = val; in instruction_pointer_set()
76 static inline unsigned long regs_get_register(struct pt_regs *regs, in regs_get_register() argument
82 return *(unsigned long *)((unsigned long)regs + offset); in regs_get_register()
88 #define user_mode(regs) (((regs)->cp0_status & KU_MASK) == KU_USER) argument
90 #define instruction_pointer(regs) ((regs)->cp0_epc) argument
91 #define profile_pc(regs) instruction_pointer(regs) argument
[all …]
/rk3399_rockchip-uboot/arch/arm/lib/
H A Dinterrupts.c58 void show_regs (struct pt_regs *regs) in show_regs() argument
73 flags = condition_codes (regs); in show_regs()
76 pc = instruction_pointer(regs) - gd->reloc_off; in show_regs()
77 lr = regs->ARM_lr - gd->reloc_off; in show_regs()
79 pc = instruction_pointer(regs); in show_regs()
80 lr = regs->ARM_lr; in show_regs()
85 regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); in show_regs()
87 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8); in show_regs()
89 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4); in show_regs()
91 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0); in show_regs()
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/mxs/
H A Dspl_lradc_init.c19 struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; in mxs_lradc_init() local
23 writel(LRADC_CTRL0_SFTRST, &regs->hw_lradc_ctrl0_clr); in mxs_lradc_init()
24 writel(LRADC_CTRL0_CLKGATE, &regs->hw_lradc_ctrl0_clr); in mxs_lradc_init()
25 writel(LRADC_CTRL0_ONCHIP_GROUNDREF, &regs->hw_lradc_ctrl0_clr); in mxs_lradc_init()
27 clrsetbits_le32(&regs->hw_lradc_ctrl3, in mxs_lradc_init()
31 clrsetbits_le32(&regs->hw_lradc_ctrl4, in mxs_lradc_init()
40 struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; in mxs_lradc_enable_batt_measurement() local
45 if (!(readl(&regs->hw_lradc_status) & LRADC_STATUS_CHANNEL7_PRESENT)) { in mxs_lradc_enable_batt_measurement()
52 writel(LRADC_CTRL1_LRADC7_IRQ_EN, &regs->hw_lradc_ctrl1_clr); in mxs_lradc_enable_batt_measurement()
53 writel(LRADC_CTRL1_LRADC7_IRQ, &regs->hw_lradc_ctrl1_clr); in mxs_lradc_enable_batt_measurement()
[all …]
/rk3399_rockchip-uboot/arch/mips/mach-ath79/qca953x/
H A Dddr.c224 void __iomem *regs; in ddr_init() local
227 regs = map_physmem(AR71XX_DDR_CTRL_BASE, AR71XX_DDR_CTRL_SIZE, in ddr_init()
231 writel(DDR_CTL_CONFIG_VAL, regs + QCA953X_DDR_REG_CTL_CONF); in ddr_init()
235 writel(0xffff, regs + AR71XX_DDR_REG_RD_CYCLE); in ddr_init()
239 writel(DDR_BURST_VAL, regs + QCA953X_DDR_REG_BURST); in ddr_init()
241 writel(DDR_BURST2_VAL, regs + QCA953X_DDR_REG_BURST2); in ddr_init()
245 writel(0xfffff, regs + QCA953X_DDR_REG_TIMEOUT_MAX); in ddr_init()
249 writel(DDR1_CONF_REG_VAL, regs + AR71XX_DDR_REG_CONFIG); in ddr_init()
251 writel(DDR1_CONF2_REG_VAL, regs + AR71XX_DDR_REG_CONFIG2); in ddr_init()
253 writel(DDR1_CONF3_REG_VAL, regs + QCA953X_DDR_REG_CONFIG3); in ddr_init()
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/rk3399_rockchip-uboot/drivers/mmc/
H A Ddavinci_mmc.c31 struct davinci_mmc_regs *regs = host->reg_base; in dmmc_set_clock() local
39 set_val(&regs->mmcclk, 0); in dmmc_set_clock()
54 set_val(&regs->mmcclk, (clkrt | MMCCLK_CLKEN)); in dmmc_set_clock()
59 dmmc_wait_fifo_status(volatile struct davinci_mmc_regs *regs, uint status) in dmmc_wait_fifo_status() argument
63 while (--wdog && ((get_val(&regs->mmcst1) & status) != status)) in dmmc_wait_fifo_status()
66 if (!(get_val(&regs->mmcctl) & MMCCTL_WIDTH_4_BIT)) in dmmc_wait_fifo_status()
76 static int dmmc_busy_wait(volatile struct davinci_mmc_regs *regs) in dmmc_busy_wait() argument
80 while (--wdog && (get_val(&regs->mmcst1) & MMCST1_BUSY)) in dmmc_busy_wait()
90 static int dmmc_check_status(volatile struct davinci_mmc_regs *regs, in dmmc_check_status() argument
99 mmcstatus = get_val(&regs->mmcst1); in dmmc_check_status()
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