| #
6e2941d7 |
| 17-May-2017 |
Simon Glass <sjg@chromium.org> |
common: freescale: Move arch-specific declarations
The declarations should not be in common.h. Move them to the arch-specific headers.
Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup th
common: freescale: Move arch-specific declarations
The declarations should not be in common.h. Move them to the arch-specific headers.
Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <trini@konsulko.com>
show more ...
|
| #
51370d56 |
| 28-Dec-2016 |
York Sun <york.sun@nxp.com> |
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage.
Signed-off-by: York Sun <york.sun@nxp.com>
show more ...
|
| #
b9cb6482 |
| 02-Mar-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
|
| #
1606b34a |
| 25-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
|
| #
03e664d8 |
| 06-Jan-2015 |
York Sun <yorksun@freescale.com> |
driver/ddr/fsl: Add support for multiple DDR clocks
Controller number is passed for function calls to support individual DDR clock, depending on SoC implementation. It is backward compatible with ex
driver/ddr/fsl: Add support for multiple DDR clocks
Controller number is passed for function calls to support individual DDR clock, depending on SoC implementation. It is backward compatible with exising platforms. Multiple clocks have been verifyed on LS2085A emulator.
Signed-off-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
2c49323d |
| 11-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
|
| #
a7787b78 |
| 21-Nov-2014 |
Tang Yuantian <Yuantian.Tang@freescale.com> |
fsl/sleep: updated the deep sleep framework for QorIQ platforms
With the introducing of generic board and ARM-based cores, current deep sleep framework doesn't work anymore. This patch will convert
fsl/sleep: updated the deep sleep framework for QorIQ platforms
With the introducing of generic board and ARM-based cores, current deep sleep framework doesn't work anymore. This patch will convert the current framework to adapt this change. Basically it does: 1. Converts all the Freescale's DDR driver to support deep sleep. 2. Added basic framework support for ARM-based and PPC-based cores separately.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
42817eb8 |
| 22-Sep-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
| #
8c9c74e4 |
| 10-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
|
| #
5cb27c5d |
| 05-Sep-2014 |
York Sun <yorksun@freescale.com> |
driver/ddr/freescale: Fix DDR3 driver for ARM
Reading DDR register should use ddr_in32() for proper endianess. This patch fixes incorrect waiting time for ARM platforms.
Signed-off-by: York Sun <yo
driver/ddr/freescale: Fix DDR3 driver for ARM
Reading DDR register should use ddr_in32() for proper endianess. This patch fixes incorrect waiting time for ARM platforms.
Signed-off-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
1ad6364e |
| 05-Mar-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
| #
4e5b1bd0 |
| 10-Feb-2014 |
York Sun <yorksun@freescale.com> |
driver/ddr: Change Freescale ARM DDR driver to support both big and little endian
Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have lit
driver/ddr: Change Freescale ARM DDR driver to support both big and little endian
Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have little endian.
Signed-off-by: York Sun <yorksun@freescale.com>
show more ...
|
| #
f15ea6e1 |
| 10-Dec-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compul
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
show more ...
|
| #
77fdd6d1 |
| 02-Dec-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
9ac4ffbd |
| 30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Add Freescale DDR driver for ARM
Make PowerPC specific code conditional so ARM SoCs can reuse this driver. Add DDR3 driver for ARM.
Signed-off-by: York Sun <yorksun@freescale.com>
|