| /rk3399_rockchip-uboot/arch/x86/cpu/ivybridge/ |
| H A D | lpc.c | 30 static int pch_enable_apic(struct udevice *pch) in pch_enable_apic() argument 36 dm_pci_write_config8(pch, ACPI_CNTL, 0x80); in pch_enable_apic() 72 static void pch_enable_serial_irqs(struct udevice *pch) in pch_enable_serial_irqs() argument 79 dm_pci_write_config8(pch, SERIRQ_CNTL, value); in pch_enable_serial_irqs() 81 dm_pci_write_config8(pch, SERIRQ_CNTL, value | (1 << 6)); in pch_enable_serial_irqs() 85 static int pch_pirq_init(struct udevice *pch) in pch_pirq_init() argument 89 if (fdtdec_get_byte_array(gd->fdt_blob, dev_of_offset(pch), in pch_pirq_init() 93 dm_pci_write_config8(pch, PIRQA_ROUT, *ptr++); in pch_pirq_init() 94 dm_pci_write_config8(pch, PIRQB_ROUT, *ptr++); in pch_pirq_init() 95 dm_pci_write_config8(pch, PIRQC_ROUT, *ptr++); in pch_pirq_init() [all …]
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| H A D | sata.c | 39 static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch) in bd82x6x_sata_init() argument 158 pch_iobp_update(pch, SATA_IOBP_SP0G3IR, 0, port_tx); in bd82x6x_sata_init() 162 pch_iobp_update(pch, SATA_IOBP_SP1G3IR, 0, port_tx); in bd82x6x_sata_init() 187 pch_iobp_update(pch, 0xea004001, 0x3fffffff, 0xc0000000); in bd82x6x_sata_init() 188 pch_iobp_update(pch, 0xea00408a, 0xfffffcff, 0x00000100); in bd82x6x_sata_init() 228 struct udevice *pch; in bd82x6x_sata_probe() local 231 ret = uclass_first_device_err(UCLASS_PCH, &pch); in bd82x6x_sata_probe() 238 bd82x6x_sata_init(dev, pch); in bd82x6x_sata_probe()
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| /rk3399_rockchip-uboot/arch/x86/cpu/intel_common/ |
| H A D | lpc.c | 20 static void enable_spi_prefetch(struct udevice *pch) in enable_spi_prefetch() argument 24 dm_pci_read_config8(pch, 0xdc, ®8); in enable_spi_prefetch() 27 dm_pci_write_config8(pch, 0xdc, reg8); in enable_spi_prefetch() 30 static void enable_port80_on_lpc(struct udevice *pch) in enable_port80_on_lpc() argument 33 dm_pci_write_config32(pch, PCH_RCBA_BASE, RCB_BASE_ADDRESS | 1); in enable_port80_on_lpc() 45 struct udevice *pch = dev->parent; in lpc_common_early_init() local 60 dm_pci_write_config16(pch, LPC_IO_DEC, 0x0010); in lpc_common_early_init() 63 dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | MC_LPC_EN | in lpc_common_early_init() 73 dm_pci_write_config32(pch, LPC_GENX_DEC(i), reg); in lpc_common_early_init() 76 enable_spi_prefetch(pch); in lpc_common_early_init() [all …]
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| H A D | Makefile | 18 obj-y += pch.o
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| /rk3399_rockchip-uboot/board/intel/cougarcanyon2/ |
| H A D | cougarcanyon2.c | 21 struct udevice *pch; in board_early_init_f() local 24 ret = uclass_first_device(UCLASS_PCH, &pch); in board_early_init_f() 27 if (!pch) in board_early_init_f() 31 dm_pci_write_config16(pch, LPC_IO_DEC, COMA_DEC_RANGE | COMB_DEC_RANGE); in board_early_init_f() 32 dm_pci_write_config16(pch, LPC_EN, KBC_LPC_EN | COMA_LPC_EN); in board_early_init_f() 33 dm_pci_write_config32(pch, LPC_GEN1_DEC, GEN_DEC_RANGE_256B | in board_early_init_f() 35 dm_pci_write_config32(pch, LPC_GEN2_DEC, GEN_DEC_RANGE_16B | in board_early_init_f()
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| /rk3399_rockchip-uboot/arch/x86/lib/ |
| H A D | pinctrl_ich6.c | 155 struct udevice *pch; in ich6_pinctrl_probe() local 162 ret = uclass_first_device(UCLASS_PCH, &pch); in ich6_pinctrl_probe() 165 if (!pch) in ich6_pinctrl_probe() 173 ret = pch_get_gpio_base(pch, &gpiobase); in ich6_pinctrl_probe() 184 ret = pch_get_io_base(pch, &iobase); in ich6_pinctrl_probe()
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| /rk3399_rockchip-uboot/drivers/pch/ |
| H A D | Makefile | 5 obj-y += pch-uclass.o
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| H A D | pch-uclass.c | 57 UCLASS_DRIVER(pch) = {
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| /rk3399_rockchip-uboot/arch/x86/cpu/broadwell/ |
| H A D | pinctrl_broadwell.c | 213 struct udevice *pch; in broadwell_pinctrl_probe() local 218 ret = uclass_first_device(UCLASS_PCH, &pch); in broadwell_pinctrl_probe() 221 if (!pch) in broadwell_pinctrl_probe() 234 ret = pch_get_gpio_base(pch, &gpiobase); in broadwell_pinctrl_probe()
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| H A D | Makefile | 12 obj-y += pch.o
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| H A D | pch.c | 144 int enable_alt_smi(struct udevice *pch, u32 mask) in enable_alt_smi() argument 150 ret = pch_get_gpio_base(pch, &gpiobase); in enable_alt_smi()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/video/ |
| H A D | intel-gma.txt | 24 - intel,pch-backlight : Value for PCH Backlight PWM 39 intel,pch-backlight = <0x04000000>;
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| /rk3399_rockchip-uboot/arch/x86/dts/ |
| H A D | broadwell_som-6896.dts | 34 pch@1f,0 {
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| H A D | chromebox_panther.dts | 35 pch@1f,0 {
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| H A D | qemu-x86_i440fx.dts | 56 pch@1,0 {
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| H A D | cougarcanyon2.dts | 63 pch@1f,0 {
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| H A D | qemu-x86_q35.dts | 67 pch@1f,0 {
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| H A D | chromebook_samus.dts | 493 intel,pch-backlight = <0x04000200>; 514 pch@1f,0 { 516 compatible = "intel,broadwell-pch";
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| H A D | galileo.dts | 94 pch@1f,0 {
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| H A D | chromebook_link.dts | 366 intel,pch-backlight = <0x04000000>; 385 pch@1f,0 {
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| H A D | crownbay.dts | 148 pch@1f,0 {
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| H A D | baytrail_som-db5800-som-6867.dts | 122 pch@1f,0 {
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| H A D | bayleybay.dts | 99 pch@1f,0 {
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| H A D | conga-qeval20-qa3-e3845.dts | 109 pch@1f,0 {
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| /rk3399_rockchip-uboot/drivers/ |
| H A D | Makefile | 51 obj-$(CONFIG_SPL_PCH_SUPPORT) += pch/ 102 obj-$(CONFIG_X86) += pch/
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