1ade8127aSBin Meng/dts-v1/; 2ade8127aSBin Meng 30a10f440SSimon Glass#include <dt-bindings/gpio/x86-gpio.h> 40a10f440SSimon Glass 5ade8127aSBin Meng/include/ "skeleton.dtsi" 66b44ae6bSSimon Glass/include/ "keyboard.dtsi" 7ade8127aSBin Meng/include/ "serial.dtsi" 893f8a311SBin Meng/include/ "rtc.dtsi" 980af3984SBin Meng/include/ "tsc_timer.dtsi" 102d3c573eSBin Meng/include/ "coreboot_fb.dtsi" 11ade8127aSBin Meng 12ade8127aSBin Meng/ { 13ade8127aSBin Meng model = "Google Link"; 14ade8127aSBin Meng compatible = "google,link", "intel,celeron-ivybridge"; 15ade8127aSBin Meng 16a9aff2f4SSimon Glass aliases { 1781aaa3d9SBin Meng spi0 = &spi; 18278d3a44SSimon Glass usb0 = &usb_0; 19278d3a44SSimon Glass usb1 = &usb_1; 20a9aff2f4SSimon Glass }; 21a9aff2f4SSimon Glass 22ade8127aSBin Meng config { 23ade8127aSBin Meng silent_console = <0>; 24ade8127aSBin Meng }; 25ade8127aSBin Meng 26bba22a97SSimon Glass cpus { 27bba22a97SSimon Glass #address-cells = <1>; 28bba22a97SSimon Glass #size-cells = <0>; 29*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 30bba22a97SSimon Glass 31bba22a97SSimon Glass cpu@0 { 32bba22a97SSimon Glass device_type = "cpu"; 33bba22a97SSimon Glass compatible = "intel,core-gen3"; 34bba22a97SSimon Glass reg = <0>; 35bba22a97SSimon Glass intel,apic-id = <0>; 36*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 37bba22a97SSimon Glass }; 38bba22a97SSimon Glass 39bba22a97SSimon Glass cpu@1 { 40bba22a97SSimon Glass device_type = "cpu"; 41bba22a97SSimon Glass compatible = "intel,core-gen3"; 42bba22a97SSimon Glass reg = <1>; 43bba22a97SSimon Glass intel,apic-id = <1>; 44*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 45bba22a97SSimon Glass }; 46bba22a97SSimon Glass 47bba22a97SSimon Glass cpu@2 { 48bba22a97SSimon Glass device_type = "cpu"; 49bba22a97SSimon Glass compatible = "intel,core-gen3"; 50bba22a97SSimon Glass reg = <2>; 51bba22a97SSimon Glass intel,apic-id = <2>; 52*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 53bba22a97SSimon Glass }; 54bba22a97SSimon Glass 55bba22a97SSimon Glass cpu@3 { 56bba22a97SSimon Glass device_type = "cpu"; 57bba22a97SSimon Glass compatible = "intel,core-gen3"; 58bba22a97SSimon Glass reg = <3>; 59bba22a97SSimon Glass intel,apic-id = <3>; 60*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 61bba22a97SSimon Glass }; 62bba22a97SSimon Glass 63bba22a97SSimon Glass }; 64bba22a97SSimon Glass 65ade8127aSBin Meng chosen { 66ade8127aSBin Meng stdout-path = "/serial"; 67ade8127aSBin Meng }; 68ade8127aSBin Meng 696b44ae6bSSimon Glass keyboard { 706b44ae6bSSimon Glass intel,duplicate-por; 716b44ae6bSSimon Glass }; 726b44ae6bSSimon Glass 730a10f440SSimon Glass pch_pinctrl { 740a10f440SSimon Glass compatible = "intel,x86-pinctrl"; 750a10f440SSimon Glass u-boot,dm-pre-reloc; 760a10f440SSimon Glass reg = <0 0>; 770a10f440SSimon Glass 780a10f440SSimon Glass gpio_a0 { 790a10f440SSimon Glass gpio-offset = <0 0>; 800a10f440SSimon Glass mode-gpio; 810a10f440SSimon Glass direction = <PIN_INPUT>; 820a10f440SSimon Glass }; 830a10f440SSimon Glass 840a10f440SSimon Glass gpio_a1 { 850a10f440SSimon Glass gpio-offset = <0>; 860a10f440SSimon Glass mode-gpio; 870a10f440SSimon Glass direction = <PIN_OUTPUT>; 880a10f440SSimon Glass output-value = <1>; 890a10f440SSimon Glass }; 900a10f440SSimon Glass 910a10f440SSimon Glass gpio_a3 { 920a10f440SSimon Glass gpio-offset = <0 3>; 930a10f440SSimon Glass mode-gpio; 940a10f440SSimon Glass direction = <PIN_INPUT>; 950a10f440SSimon Glass }; 960a10f440SSimon Glass 970a10f440SSimon Glass gpio_a5 { 980a10f440SSimon Glass gpio-offset = <0 5>; 990a10f440SSimon Glass mode-gpio; 1000a10f440SSimon Glass direction = <PIN_INPUT>; 1010a10f440SSimon Glass }; 1020a10f440SSimon Glass 1030a10f440SSimon Glass gpio_a6 { 1040a10f440SSimon Glass gpio-offset = <0 6>; 1050a10f440SSimon Glass mode-gpio; 1060a10f440SSimon Glass direction = <PIN_OUTPUT>; 1070a10f440SSimon Glass output-value = <1>; 1080a10f440SSimon Glass }; 1090a10f440SSimon Glass 1100a10f440SSimon Glass gpio_a7 { 1110a10f440SSimon Glass gpio-offset = <0 7>; 1120a10f440SSimon Glass mode-gpio; 1130a10f440SSimon Glass direction = <PIN_INPUT>; 1140a10f440SSimon Glass invert; 1150a10f440SSimon Glass }; 1160a10f440SSimon Glass 1170a10f440SSimon Glass gpio_a8 { 1180a10f440SSimon Glass gpio-offset = <0 8>; 1190a10f440SSimon Glass mode-gpio; 1200a10f440SSimon Glass direction = <PIN_INPUT>; 1210a10f440SSimon Glass invert; 1220a10f440SSimon Glass }; 1230a10f440SSimon Glass 1240a10f440SSimon Glass gpio_a9 { 1250a10f440SSimon Glass gpio-offset = <0 9>; 1260a10f440SSimon Glass mode-gpio; 1270a10f440SSimon Glass direction = <PIN_INPUT>; 1280a10f440SSimon Glass }; 1290a10f440SSimon Glass 1300a10f440SSimon Glass gpio_a10 { 1310a10f440SSimon Glass u-boot,dm-pre-reloc; 1320a10f440SSimon Glass gpio-offset = <0 10>; 1330a10f440SSimon Glass mode-gpio; 1340a10f440SSimon Glass direction = <PIN_INPUT>; 1350a10f440SSimon Glass }; 1360a10f440SSimon Glass 1370a10f440SSimon Glass gpio_a11 { 1380a10f440SSimon Glass gpio-offset = <0 11>; 1390a10f440SSimon Glass mode-gpio; 1400a10f440SSimon Glass direction = <PIN_INPUT>; 1410a10f440SSimon Glass }; 1420a10f440SSimon Glass 1430a10f440SSimon Glass gpio_a12 { 1440a10f440SSimon Glass gpio-offset = <0 12>; 1450a10f440SSimon Glass mode-gpio; 1460a10f440SSimon Glass direction = <PIN_INPUT>; 1470a10f440SSimon Glass invert; 1480a10f440SSimon Glass }; 1490a10f440SSimon Glass 1500a10f440SSimon Glass gpio_a14 { 1510a10f440SSimon Glass gpio-offset = <0 14>; 1520a10f440SSimon Glass mode-gpio; 1530a10f440SSimon Glass direction = <PIN_INPUT>; 1540a10f440SSimon Glass invert; 1550a10f440SSimon Glass }; 1560a10f440SSimon Glass 1570a10f440SSimon Glass gpio_a15 { 1580a10f440SSimon Glass gpio-offset = <0 15>; 1590a10f440SSimon Glass mode-gpio; 1600a10f440SSimon Glass direction = <PIN_INPUT>; 1610a10f440SSimon Glass invert; 1620a10f440SSimon Glass }; 1630a10f440SSimon Glass 1640a10f440SSimon Glass gpio_a21 { 1650a10f440SSimon Glass gpio-offset = <0 21>; 1660a10f440SSimon Glass mode-gpio; 1670a10f440SSimon Glass direction = <PIN_INPUT>; 1680a10f440SSimon Glass }; 1690a10f440SSimon Glass 1700a10f440SSimon Glass gpio_a24 { 1710a10f440SSimon Glass gpio-offset = <0 24>; 1720a10f440SSimon Glass mode-gpio; 1730a10f440SSimon Glass output-value = <0>; 1740a10f440SSimon Glass direction = <PIN_OUTPUT>; 1750a10f440SSimon Glass }; 1760a10f440SSimon Glass 1770a10f440SSimon Glass gpio_a28 { 1780a10f440SSimon Glass gpio-offset = <0 28>; 1790a10f440SSimon Glass mode-gpio; 1800a10f440SSimon Glass direction = <PIN_INPUT>; 1810a10f440SSimon Glass }; 1820a10f440SSimon Glass 1830a10f440SSimon Glass gpio_b4 { 1840a10f440SSimon Glass gpio-offset = <0x30 4>; 1850a10f440SSimon Glass mode-gpio; 1860a10f440SSimon Glass direction = <PIN_OUTPUT>; 1870a10f440SSimon Glass output-value = <1>; 1880a10f440SSimon Glass }; 1890a10f440SSimon Glass 1900a10f440SSimon Glass gpio_b9 { 1910a10f440SSimon Glass u-boot,dm-pre-reloc; 1920a10f440SSimon Glass gpio-offset = <0x30 9>; 1930a10f440SSimon Glass mode-gpio; 1940a10f440SSimon Glass direction = <PIN_INPUT>; 1950a10f440SSimon Glass }; 1960a10f440SSimon Glass 1970a10f440SSimon Glass gpio_b10 { 1980a10f440SSimon Glass u-boot,dm-pre-reloc; 1990a10f440SSimon Glass gpio-offset = <0x30 10>; 2000a10f440SSimon Glass mode-gpio; 2010a10f440SSimon Glass direction = <PIN_INPUT>; 2020a10f440SSimon Glass }; 2030a10f440SSimon Glass 2040a10f440SSimon Glass gpio_b11 { 2050a10f440SSimon Glass u-boot,dm-pre-reloc; 2060a10f440SSimon Glass gpio-offset = <0x30 11>; 2070a10f440SSimon Glass mode-gpio; 2080a10f440SSimon Glass direction = <PIN_INPUT>; 2090a10f440SSimon Glass }; 2100a10f440SSimon Glass 2110a10f440SSimon Glass gpio_b25 { 2120a10f440SSimon Glass gpio-offset = <0x30 25>; 2130a10f440SSimon Glass mode-gpio; 2140a10f440SSimon Glass direction = <PIN_INPUT>; 2150a10f440SSimon Glass }; 2160a10f440SSimon Glass 2170a10f440SSimon Glass gpio_b28 { 2180a10f440SSimon Glass gpio-offset = <0x30 28>; 2190a10f440SSimon Glass mode-gpio; 2200a10f440SSimon Glass direction = <PIN_OUTPUT>; 2210a10f440SSimon Glass output-value = <1>; 2220a10f440SSimon Glass }; 2230a10f440SSimon Glass 2240a10f440SSimon Glass }; 2250a10f440SSimon Glass 226a86d4549SSimon Glass pci { 227a86d4549SSimon Glass compatible = "pci-x86"; 228a86d4549SSimon Glass #address-cells = <3>; 229a86d4549SSimon Glass #size-cells = <2>; 230a86d4549SSimon Glass u-boot,dm-pre-reloc; 231a86d4549SSimon Glass ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 232a86d4549SSimon Glass 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 233a86d4549SSimon Glass 0x01000000 0x0 0x1000 0x1000 0 0xefff>; 234a86d4549SSimon Glass 235a86d4549SSimon Glass northbridge@0,0 { 236a86d4549SSimon Glass reg = <0x00000000 0 0 0 0>; 237*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 238a86d4549SSimon Glass compatible = "intel,bd82x6x-northbridge"; 239963a811aSSimon Glass board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>, 240963a811aSSimon Glass <&gpio_b 11 0>, <&gpio_a 10 0>; 241ade8127aSBin Meng spd { 242*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 243ade8127aSBin Meng #address-cells = <1>; 244ade8127aSBin Meng #size-cells = <0>; 245ade8127aSBin Meng elpida_4Gb_1600_x16 { 246*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 247ade8127aSBin Meng reg = <0>; 248ade8127aSBin Meng data = [92 10 0b 03 04 19 02 02 249ade8127aSBin Meng 03 52 01 08 0a 00 fe 00 250ade8127aSBin Meng 69 78 69 3c 69 11 18 81 251ade8127aSBin Meng 20 08 3c 3c 01 40 83 81 252ade8127aSBin Meng 00 00 00 00 00 00 00 00 253ade8127aSBin Meng 00 00 00 00 00 00 00 00 254ade8127aSBin Meng 00 00 00 00 00 00 00 00 255ade8127aSBin Meng 00 00 00 00 0f 11 42 00 256ade8127aSBin Meng 00 00 00 00 00 00 00 00 257ade8127aSBin Meng 00 00 00 00 00 00 00 00 258ade8127aSBin Meng 00 00 00 00 00 00 00 00 259ade8127aSBin Meng 00 00 00 00 00 00 00 00 260ade8127aSBin Meng 00 00 00 00 00 00 00 00 261ade8127aSBin Meng 00 00 00 00 00 00 00 00 262ade8127aSBin Meng 00 00 00 00 00 02 fe 00 263ade8127aSBin Meng 11 52 00 00 00 07 7f 37 264ade8127aSBin Meng 45 42 4a 32 30 55 47 36 265ade8127aSBin Meng 45 42 55 30 2d 47 4e 2d 266ade8127aSBin Meng 46 20 30 20 02 fe 00 00 267ade8127aSBin Meng 00 00 00 00 00 00 00 00 268ade8127aSBin Meng 00 00 00 00 00 00 00 00 269ade8127aSBin Meng 00 00 00 00 00 00 00 00 270ade8127aSBin Meng 00 00 00 00 00 00 00 00 271ade8127aSBin Meng 00 00 00 00 00 00 00 00 272ade8127aSBin Meng 00 00 00 00 00 00 00 00 273ade8127aSBin Meng 00 00 00 00 00 00 00 00 274ade8127aSBin Meng 00 00 00 00 00 00 00 00 275ade8127aSBin Meng 00 00 00 00 00 00 00 00 276ade8127aSBin Meng 00 00 00 00 00 00 00 00 277ade8127aSBin Meng 00 00 00 00 00 00 00 00 278ade8127aSBin Meng 00 00 00 00 00 00 00 00 279ade8127aSBin Meng 00 00 00 00 00 00 00 00]; 280ade8127aSBin Meng }; 281ade8127aSBin Meng samsung_4Gb_1600_1.35v_x16 { 282*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 283ade8127aSBin Meng reg = <1>; 284ade8127aSBin Meng data = [92 11 0b 03 04 19 02 02 285ade8127aSBin Meng 03 11 01 08 0a 00 fe 00 286ade8127aSBin Meng 69 78 69 3c 69 11 18 81 287ade8127aSBin Meng f0 0a 3c 3c 01 40 83 01 288ade8127aSBin Meng 00 80 00 00 00 00 00 00 289ade8127aSBin Meng 00 00 00 00 00 00 00 00 290ade8127aSBin Meng 00 00 00 00 00 00 00 00 291ade8127aSBin Meng 00 00 00 00 0f 11 02 00 292ade8127aSBin Meng 00 00 00 00 00 00 00 00 293ade8127aSBin Meng 00 00 00 00 00 00 00 00 294ade8127aSBin Meng 00 00 00 00 00 00 00 00 295ade8127aSBin Meng 00 00 00 00 00 00 00 00 296ade8127aSBin Meng 00 00 00 00 00 00 00 00 297ade8127aSBin Meng 00 00 00 00 00 00 00 00 298ade8127aSBin Meng 00 00 00 00 00 80 ce 01 299ade8127aSBin Meng 00 00 00 00 00 00 6a 04 300ade8127aSBin Meng 4d 34 37 31 42 35 36 37 301ade8127aSBin Meng 34 42 48 30 2d 59 4b 30 302ade8127aSBin Meng 20 20 00 00 80 ce 00 00 303ade8127aSBin Meng 00 00 00 00 00 00 00 00 304ade8127aSBin Meng 00 00 00 00 00 00 00 00 305ade8127aSBin Meng 00 00 00 00 00 00 00 00 306ade8127aSBin Meng 00 00 00 00 00 00 00 00 307ade8127aSBin Meng 00 00 00 00 00 00 00 00 308ade8127aSBin Meng 00 00 00 00 00 00 00 00 309ade8127aSBin Meng 00 00 00 00 00 00 00 00 310ade8127aSBin Meng 00 00 00 00 00 00 00 00 311ade8127aSBin Meng 00 00 00 00 00 00 00 00 312ade8127aSBin Meng 00 00 00 00 00 00 00 00 313ade8127aSBin Meng 00 00 00 00 00 00 00 00 314ade8127aSBin Meng 00 00 00 00 00 00 00 00 315ade8127aSBin Meng 00 00 00 00 00 00 00 00]; 316ade8127aSBin Meng }; 317ade8127aSBin Meng micron_4Gb_1600_1.35v_x16 { 318ade8127aSBin Meng reg = <2>; 319ade8127aSBin Meng data = [92 11 0b 03 04 19 02 02 320ade8127aSBin Meng 03 11 01 08 0a 00 fe 00 321ade8127aSBin Meng 69 78 69 3c 69 11 18 81 322ade8127aSBin Meng 20 08 3c 3c 01 40 83 05 323ade8127aSBin Meng 00 00 00 00 00 00 00 00 324ade8127aSBin Meng 00 00 00 00 00 00 00 00 325ade8127aSBin Meng 00 00 00 00 00 00 00 00 326ade8127aSBin Meng 00 00 00 00 0f 01 02 00 327ade8127aSBin Meng 00 00 00 00 00 00 00 00 328ade8127aSBin Meng 00 00 00 00 00 00 00 00 329ade8127aSBin Meng 00 00 00 00 00 00 00 00 330ade8127aSBin Meng 00 00 00 00 00 00 00 00 331ade8127aSBin Meng 00 00 00 00 00 00 00 00 332ade8127aSBin Meng 00 00 00 00 00 00 00 00 333ade8127aSBin Meng 00 00 00 00 00 80 2c 00 334ade8127aSBin Meng 00 00 00 00 00 00 ad 75 335ade8127aSBin Meng 34 4b 54 46 32 35 36 36 336ade8127aSBin Meng 34 48 5a 2d 31 47 36 45 337ade8127aSBin Meng 31 20 45 31 80 2c 00 00 338ade8127aSBin Meng 00 00 00 00 00 00 00 00 339ade8127aSBin Meng 00 00 00 00 00 00 00 00 340ade8127aSBin Meng 00 00 00 00 00 00 00 00 341ade8127aSBin Meng ff ff ff ff ff ff ff ff 342ade8127aSBin Meng ff ff ff ff ff ff ff ff 343ade8127aSBin Meng ff ff ff ff ff ff ff ff 344ade8127aSBin Meng ff ff ff ff ff ff ff ff 345ade8127aSBin Meng ff ff ff ff ff ff ff ff 346ade8127aSBin Meng ff ff ff ff ff ff ff ff 347ade8127aSBin Meng ff ff ff ff ff ff ff ff 348ade8127aSBin Meng ff ff ff ff ff ff ff ff 349ade8127aSBin Meng ff ff ff ff ff ff ff ff 350ade8127aSBin Meng ff ff ff ff ff ff ff ff]; 351ade8127aSBin Meng }; 352ade8127aSBin Meng }; 353e40a6e3fSSimon Glass }; 354e40a6e3fSSimon Glass 35525d5352cSSimon Glass gma@2,0 { 35625d5352cSSimon Glass reg = <0x00001000 0 0 0 0>; 357ade8127aSBin Meng compatible = "intel,gma"; 358ade8127aSBin Meng intel,dp_hotplug = <0 0 0x06>; 359ade8127aSBin Meng intel,panel-port-select = <1>; 360ade8127aSBin Meng intel,panel-power-cycle-delay = <6>; 361ade8127aSBin Meng intel,panel-power-up-delay = <2000>; 362ade8127aSBin Meng intel,panel-power-down-delay = <500>; 363ade8127aSBin Meng intel,panel-power-backlight-on-delay = <2000>; 364ade8127aSBin Meng intel,panel-power-backlight-off-delay = <2000>; 365ade8127aSBin Meng intel,cpu-backlight = <0x00000200>; 366ade8127aSBin Meng intel,pch-backlight = <0x04000000>; 367ade8127aSBin Meng }; 368ade8127aSBin Meng 369c02a4242SSimon Glass me@16,0 { 370c02a4242SSimon Glass reg = <0x0000b000 0 0 0 0>; 371c02a4242SSimon Glass compatible = "intel,me"; 372c02a4242SSimon Glass u-boot,dm-pre-reloc; 373c02a4242SSimon Glass }; 374c02a4242SSimon Glass 375278d3a44SSimon Glass usb_1: usb@1a,0 { 376278d3a44SSimon Glass reg = <0x0000d000 0 0 0 0>; 377278d3a44SSimon Glass compatible = "ehci-pci"; 378278d3a44SSimon Glass }; 379278d3a44SSimon Glass 380278d3a44SSimon Glass usb_0: usb@1d,0 { 381278d3a44SSimon Glass reg = <0x0000e800 0 0 0 0>; 382278d3a44SSimon Glass compatible = "ehci-pci"; 383278d3a44SSimon Glass }; 384278d3a44SSimon Glass 385f2b85ab5SSimon Glass pch@1f,0 { 386aad78d27SSimon Glass reg = <0x0000f800 0 0 0 0>; 387f2b85ab5SSimon Glass compatible = "intel,bd82x6x", "intel,pch9"; 38890b16d14SSimon Glass u-boot,dm-pre-reloc; 389ade8127aSBin Meng #address-cells = <1>; 390ade8127aSBin Meng #size-cells = <1>; 391ade8127aSBin Meng intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b 392ade8127aSBin Meng 0x80 0x80 0x80 0x80>; 393ade8127aSBin Meng intel,gpi-routing = <0 0 0 0 0 0 0 2 394ade8127aSBin Meng 1 0 0 0 0 0 0 0>; 395ade8127aSBin Meng /* Enable EC SMI source */ 396ade8127aSBin Meng intel,alt-gp-smi-enable = <0x0100>; 397f2b85ab5SSimon Glass 39881aaa3d9SBin Meng spi: spi { 39990b16d14SSimon Glass #address-cells = <1>; 40090b16d14SSimon Glass #size-cells = <0>; 4011f9eb59dSBin Meng compatible = "intel,ich9-spi"; 402*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 40390b16d14SSimon Glass spi-flash@0 { 40490b16d14SSimon Glass #size-cells = <1>; 40590b16d14SSimon Glass #address-cells = <1>; 406*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 40790b16d14SSimon Glass reg = <0>; 40890b16d14SSimon Glass compatible = "winbond,w25q64", 40990b16d14SSimon Glass "spi-flash"; 41090b16d14SSimon Glass memory-map = <0xff800000 0x00800000>; 41190b16d14SSimon Glass rw-mrc-cache { 41290b16d14SSimon Glass label = "rw-mrc-cache"; 41390b16d14SSimon Glass reg = <0x003e0000 0x00010000>; 414*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 41590b16d14SSimon Glass }; 41690b16d14SSimon Glass }; 41790b16d14SSimon Glass }; 418ade8127aSBin Meng 419e9822d44SSimon Glass gpio_a: gpioa { 4203ddc1c7bSBin Meng compatible = "intel,ich6-gpio"; 4213ddc1c7bSBin Meng u-boot,dm-pre-reloc; 422e9822d44SSimon Glass #gpio-cells = <2>; 423e9822d44SSimon Glass gpio-controller; 4243ddc1c7bSBin Meng reg = <0 0x10>; 4253ddc1c7bSBin Meng bank-name = "A"; 4263ddc1c7bSBin Meng }; 4273ddc1c7bSBin Meng 428e9822d44SSimon Glass gpio_b: gpiob { 4293ddc1c7bSBin Meng compatible = "intel,ich6-gpio"; 4303ddc1c7bSBin Meng u-boot,dm-pre-reloc; 431e9822d44SSimon Glass #gpio-cells = <2>; 432e9822d44SSimon Glass gpio-controller; 4333ddc1c7bSBin Meng reg = <0x30 0x10>; 4343ddc1c7bSBin Meng bank-name = "B"; 4353ddc1c7bSBin Meng }; 4363ddc1c7bSBin Meng 437e9822d44SSimon Glass gpio_c: gpioc { 4383ddc1c7bSBin Meng compatible = "intel,ich6-gpio"; 4393ddc1c7bSBin Meng u-boot,dm-pre-reloc; 440e9822d44SSimon Glass #gpio-cells = <2>; 441e9822d44SSimon Glass gpio-controller; 4423ddc1c7bSBin Meng reg = <0x40 0x10>; 4433ddc1c7bSBin Meng bank-name = "C"; 4443ddc1c7bSBin Meng }; 4453ddc1c7bSBin Meng 44690b16d14SSimon Glass lpc { 44790b16d14SSimon Glass compatible = "intel,bd82x6x-lpc"; 44890b16d14SSimon Glass #address-cells = <1>; 44990b16d14SSimon Glass #size-cells = <0>; 4504acc83d4SSimon Glass u-boot,dm-pre-reloc; 451788cd908SSimon Glass intel,gen-dec = <0x800 0xfc 0x900 0xfc>; 452ade8127aSBin Meng cros-ec@200 { 453ade8127aSBin Meng compatible = "google,cros-ec"; 454ade8127aSBin Meng reg = <0x204 1 0x200 1 0x880 0x80>; 455ade8127aSBin Meng 45690b16d14SSimon Glass /* 45790b16d14SSimon Glass * Describes the flash memory within 45890b16d14SSimon Glass * the EC 45990b16d14SSimon Glass */ 460ade8127aSBin Meng #address-cells = <1>; 461ade8127aSBin Meng #size-cells = <1>; 462ade8127aSBin Meng flash@8000000 { 463ade8127aSBin Meng reg = <0x08000000 0x20000>; 464ade8127aSBin Meng erase-value = <0xff>; 465ade8127aSBin Meng }; 466ade8127aSBin Meng }; 467ade8127aSBin Meng }; 468ade8127aSBin Meng }; 469d46f2a68SSimon Glass 470d46f2a68SSimon Glass sata@1f,2 { 471d46f2a68SSimon Glass compatible = "intel,pantherpoint-ahci"; 472d46f2a68SSimon Glass reg = <0x0000fa00 0 0 0 0>; 473d46f2a68SSimon Glass u-boot,dm-pre-reloc; 474d46f2a68SSimon Glass intel,sata-mode = "ahci"; 475d46f2a68SSimon Glass intel,sata-port-map = <1>; 476d46f2a68SSimon Glass intel,sata-port0-gen3-tx = <0x00880a7f>; 477d46f2a68SSimon Glass }; 4780c7645bdSSimon Glass 4790c7645bdSSimon Glass smbus: smbus@1f,3 { 4800c7645bdSSimon Glass compatible = "intel,ich-i2c"; 4810c7645bdSSimon Glass reg = <0x0000fb00 0 0 0 0>; 4820c7645bdSSimon Glass u-boot,dm-pre-reloc; 4830c7645bdSSimon Glass }; 48490b16d14SSimon Glass }; 485ade8127aSBin Meng 4866e474eabSSimon Glass tpm { 4876e474eabSSimon Glass reg = <0xfed40000 0x5000>; 4886e474eabSSimon Glass compatible = "infineon,slb9635lpc"; 4896e474eabSSimon Glass }; 4906e474eabSSimon Glass 491ade8127aSBin Meng microcode { 492*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 493ade8127aSBin Meng update@0 { 494*6935dc1bSSimon Glass u-boot,dm-pre-reloc; 495ade8127aSBin Meng#include "microcode/m12306a9_0000001b.dtsi" 496ade8127aSBin Meng }; 497ade8127aSBin Meng }; 498ade8127aSBin Meng 499ade8127aSBin Meng}; 500