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Searched refs:out_le32 (Results 1 – 25 of 60) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/cpu/armv7/ls102xa/
H A Dls102xa_sata.c28 out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE); in ls1021a_sata_init()
31 out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); in ls1021a_sata_init()
32 out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG); in ls1021a_sata_init()
33 out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG); in ls1021a_sata_init()
34 out_le32(&ccsr_ahci->pp4c, AHCI_PORT_PHY_4_CFG); in ls1021a_sata_init()
35 out_le32(&ccsr_ahci->pp5c, AHCI_PORT_PHY_5_CFG); in ls1021a_sata_init()
36 out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); in ls1021a_sata_init()
H A Dsoc.c105 out_le32(&cci->slave[0].snoop_ctrl, in arch_soc_init()
107 out_le32(&cci->slave[1].snoop_ctrl, in arch_soc_init()
109 out_le32(&cci->slave[2].snoop_ctrl, in arch_soc_init()
111 out_le32(&cci->slave[4].snoop_ctrl, in arch_soc_init()
120 out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); in arch_soc_init()
121 out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); in arch_soc_init()
128 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); in arch_soc_init()
H A Dls102xa_psci.c37 out_le32(&scfg->sparecr[2], dest); in ls1_save_ddr_head()
166 out_le32(&scfg->sparecr[3], entry_point); in ls1_deep_sleep()
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c68 out_le32(eddrtqcr1, 0x63b30002); in erratum_a008336()
73 out_le32(eddrtqcr1, 0x63b30002); in erratum_a008336()
89 out_le32(eddrtqcr1, 0x63b20002); in erratum_a008514()
145 out_le32(dcfg_dcsr + DCFG_DCSR_PORCR1 / 4, val); in erratum_rcw_src()
188 out_le32(SMMU_SCR0, val); in bypass_smmu()
190 out_le32(SMMU_NSCR0, val); in bypass_smmu()
218 out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); in sata_init()
219 out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG); in sata_init()
220 out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG); in sata_init()
223 out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG); in sata_init()
[all …]
H A Dspl.c59 out_le32(SMMU_SCR0, val); in spl_board_init()
61 out_le32(SMMU_NSCR0, val); in spl_board_init()
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/
H A Dpcie.c72 out_le32(&out_win->tarl, dev_base); in mpc83xx_pcie_remap_cfg()
105 PCIE_OP(write, dword, u32, out_le32) in PCIE_OP()
192 out_le32(&pex->bridge.pex_csb_ctrl, in mpc83xx_pcie_init_bus()
197 out_le32(&pex->bridge.pex_csb_obctrl, PEX_CSB_OBCTRL_PIOE | in mpc83xx_pcie_init_bus()
202 out_le32(&out_win->ar, PEX_OWAR_EN | PEX_OWAR_TYPE_CFG | in mpc83xx_pcie_init_bus()
204 out_le32(&out_win->bar, mpc83xx_pcie_cfg_space[bus].base); in mpc83xx_pcie_init_bus()
205 out_le32(&out_win->tarl, 0); in mpc83xx_pcie_init_bus()
206 out_le32(&out_win->tarh, 0); in mpc83xx_pcie_init_bus()
215 out_le32(&out_win->bar, reg[i].phys_start); in mpc83xx_pcie_init_bus()
216 out_le32(&out_win->tarl, reg[i].bus_start); in mpc83xx_pcie_init_bus()
[all …]
/rk3399_rockchip-uboot/drivers/ata/
H A Dsata_mv.c288 out_le32(priv->regbase + EDMA_CMD, EDMA_CMD_DISEDMA); in mv_stop_edma_engine()
322 out_le32(priv->regbase + EDMA_IECR, 0x0); in mv_start_edma_engine()
326 out_le32(SATAHC_BASE + SATAHC_ICR, tmp); in mv_start_edma_engine()
332 out_le32(priv->regbase + EDMA_CFG, tmp); in mv_start_edma_engine()
334 out_le32(priv->regbase + SIR_FIS_IRQ_CAUSE, 0x0); in mv_start_edma_engine()
337 out_le32(priv->regbase + SIR_FIS_CFG, 0x0); in mv_start_edma_engine()
340 out_le32(priv->regbase + EDMA_RQBA_HI, 0x0); in mv_start_edma_engine()
341 out_le32(priv->regbase + EDMA_RQIPR, priv->request); in mv_start_edma_engine()
342 out_le32(priv->regbase + EDMA_RQOPR, 0x0); in mv_start_edma_engine()
345 out_le32(priv->regbase + EDMA_RSBA_HI, 0x0); in mv_start_edma_engine()
[all …]
H A Dfsl_sata.c163 out_le32(&reg->hcontrol, val32); in init_sata()
169 out_le32(&reg->chba, (u32)cmd_hdr & ~0x3); in init_sata()
174 out_le32(&reg->hcontrol, val32); in init_sata()
179 out_le32(&reg->hcontrol, val32); in init_sata()
183 out_le32(&reg->hstatus, val32); in init_sata()
186 out_le32(&reg->icc, 0x01000000); in init_sata()
189 out_le32(&reg->cqpmp, 0); in init_sata()
193 out_le32(&reg->serror, val32); in init_sata()
197 out_le32(&reg->cer, val32); in init_sata()
201 out_le32(&reg->der, val32); in init_sata()
[all …]
/rk3399_rockchip-uboot/drivers/net/
H A Dvsc9953.c77 out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) | in vsc9953_mdio_write()
105 out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) | in vsc9953_mdio_read()
216 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); in vsc9953_vlan_table_membership_set()
228 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); in vsc9953_vlan_table_membership_set()
243 out_le32(&l2ana_reg->ana_tables.vlan_access, val); in vsc9953_vlan_table_membership_set()
273 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); in vsc9953_vlan_membership_show()
309 out_le32(&l2ana_reg->ana_tables.vlan_tidx, in vsc9953_vlan_table_membership_all_set()
321 out_le32(&l2ana_reg->ana_tables.vlan_tidx, in vsc9953_vlan_table_membership_all_set()
375 out_le32(&l2ana_reg->port[port_no].vlan_cfg, val); in vsc9953_port_vlan_pvid_set()
381 out_le32(&l2rew_reg->port[port_no].port_vlan_cfg, val); in vsc9953_port_vlan_pvid_set()
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dsoc.h23 #define gur_out32(a, v) out_le32(a, v)
31 #define scfg_out32(a, v) out_le32(a, v)
39 #define pex_lut_out32(a, v) out_le32(a, v)
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap3/
H A Dclock.c784 out_le32(&prcm_base->fclken_iva2, FCK_IVA2_ON); in per_clocks_enable()
786 out_le32(&prcm_base->fclken1_core, FCK_CORE1_ON); in per_clocks_enable()
787 out_le32(&prcm_base->iclken1_core, ICK_CORE1_ON); in per_clocks_enable()
788 out_le32(&prcm_base->iclken2_core, ICK_CORE2_ON); in per_clocks_enable()
789 out_le32(&prcm_base->fclken_wkup, FCK_WKUP_ON); in per_clocks_enable()
790 out_le32(&prcm_base->iclken_wkup, ICK_WKUP_ON); in per_clocks_enable()
791 out_le32(&prcm_base->fclken_dss, FCK_DSS_ON); in per_clocks_enable()
792 out_le32(&prcm_base->iclken_dss, ICK_DSS_ON); in per_clocks_enable()
794 out_le32(&prcm_base->fclken_cam, FCK_CAM_ON); in per_clocks_enable()
795 out_le32(&prcm_base->iclken_cam, ICK_CAM_ON); in per_clocks_enable()
/rk3399_rockchip-uboot/drivers/pci/
H A Dpci_indirect.c45 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
56 INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
/rk3399_rockchip-uboot/board/freescale/ls1046ardb/
H A Dls1046ardb.c81 out_le32(SMMU_SCR0, val); in board_init()
83 out_le32(SMMU_NSCR0, val); in board_init()
/rk3399_rockchip-uboot/include/
H A Dbootcount.h23 out_le32(addr, data); in raw_bootcount_store()
H A Dfsl_esdhc.h188 #define esdhc_write32 out_le32
200 #define esdhc_write32 out_le32
H A Dfsl_sec_mon.h16 #define sec_mon_out32(a, v) out_le32(a, v)
/rk3399_rockchip-uboot/board/freescale/ls1043ardb/
H A Dls1043ardb.c97 out_le32(SMMU_SCR0, val); in board_init()
99 out_le32(SMMU_NSCR0, val); in board_init()
/rk3399_rockchip-uboot/board/freescale/ls1012afrdm/
H A Dls1012afrdm.c79 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in board_init()
/rk3399_rockchip-uboot/board/freescale/ls1021aqds/
H A Dls1021aqds.c248 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); in board_init_f()
441 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in board_init()
470 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in board_sleep_prepare()
/rk3399_rockchip-uboot/board/freescale/ls2080ardb/
H A Dls2080ardb.c227 out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); in board_init()
267 out_le32(GPIO4_GPDIR_ADDR, (1 << 21 | in misc_init_r()
269 out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) & in misc_init_r()
/rk3399_rockchip-uboot/board/freescale/common/
H A Dls102xa_stream_id.c34 out_le32((u32 *)(tbl[i].reg_offset), liodn); in ls1021x_config_caam_stream_id()
/rk3399_rockchip-uboot/arch/xtensa/include/asm/
H A Dio.h95 # define out_le32(b, addr) *(u32 *)(addr) = _swapl(b) macro
102 # define out_le32(b, addr) *(u32 *)(addr) = (b) macro
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Dio.h34 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
61 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
69 #define outl_p(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
238 static inline void out_le32(volatile unsigned __iomem *addr, u32 val) in out_le32() function
/rk3399_rockchip-uboot/board/freescale/ls1046aqds/
H A Dls1046aqds.c280 out_le32(SMMU_SCR0, val); in board_init()
282 out_le32(SMMU_NSCR0, val); in board_init()
/rk3399_rockchip-uboot/board/freescale/ls1012ardb/
H A Dls1012ardb.c112 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in board_init()

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