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Searched refs:offsetof (Results 1 – 25 of 80) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/lib/
H A Dasm-offsets.c41 DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl)); in main()
42 DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0)); in main()
43 DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1)); in main()
44 DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2)); in main()
45 DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2])); in main()
46 DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr)); in main()
49 DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0)); in main()
50 DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0)); in main()
51 DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc)); in main()
54 DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0)); in main()
[all …]
/rk3399_rockchip-uboot/lib/
H A Dasm-offsets.c30 DEFINE(GD_BD, offsetof(struct global_data, bd)); in main()
32 DEFINE(GD_MALLOC_BASE, offsetof(struct global_data, malloc_base)); in main()
35 DEFINE(GD_RELOCADDR, offsetof(struct global_data, relocaddr)); in main()
37 DEFINE(GD_RELOC_OFF, offsetof(struct global_data, reloc_off)); in main()
39 DEFINE(GD_START_ADDR_SP, offsetof(struct global_data, start_addr_sp)); in main()
42 DEFINE(PM_CTX_PHYS, offsetof(struct global_data, pm_ctx_phys)); in main()
44 DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd)); in main()
/rk3399_rockchip-uboot/examples/standalone/
H A Dstubs.c5 #define FO(x) offsetof(struct jt_funcs, x)
39 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r11");
53 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "x9");
65 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "ip");
83 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
99 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "t9");
115 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "gp");
131 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "a0");
143 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r5");
161 : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r1", "r2");
[all …]
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Dfsl_liodn.h20 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
26 .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
28 .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
34 .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
93 offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
110 offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
131 SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
136 SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
141 SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
147 offsetof(struct ccsr_pman, ppa1) + \
[all …]
/rk3399_rockchip-uboot/cmd/
H A Dethsw.c138 .cmd_func_offset = offsetof(struct ethsw_command_func,
146 .cmd_func_offset = offsetof(struct ethsw_command_func,
154 .cmd_func_offset = offsetof(struct ethsw_command_func,
170 .cmd_func_offset = offsetof(struct ethsw_command_func,
179 .cmd_func_offset = offsetof(struct ethsw_command_func,
203 .cmd_func_offset = offsetof(struct ethsw_command_func,
212 .cmd_func_offset = offsetof(struct ethsw_command_func,
221 .cmd_func_offset = offsetof(struct ethsw_command_func,
245 .cmd_func_offset = offsetof(struct ethsw_command_func,
254 .cmd_func_offset = offsetof(struct ethsw_command_func,
[all …]
/rk3399_rockchip-uboot/arch/x86/lib/
H A Dasm-offsets.c20 DEFINE(GD_BIST, offsetof(gd_t, arch.bist)); in main()
22 DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list)); in main()
24 DEFINE(GD_TABLE, offsetof(gd_t, arch.table)); in main()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-ls102xa/
H A Dls102xa_stream_id.h32 offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \
36 offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \
44 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
49 offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
55 offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Divc.c205 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_check_read()
220 offset = offsetof(struct tegra_ivc_channel_header, r_count); in tegra_ivc_check_write()
270 offset = offsetof(struct tegra_ivc_channel_header, r_count); in tegra_ivc_read_advance()
278 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_read_advance()
316 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_write_advance()
324 offset = offsetof(struct tegra_ivc_channel_header, r_count); in tegra_ivc_write_advance()
358 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
391 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
429 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
451 offset = offsetof(struct tegra_ivc_channel_header, w_count); in tegra_ivc_channel_notified()
[all …]
/rk3399_rockchip-uboot/drivers/usb/host/
H A Dehci-mxs.c38 offsetof(struct mxs_clkctrl_regs,
50 offsetof(struct mxs_clkctrl_regs,
66 pll_offset = offsetof(struct mxs_register_32, reg_set); in ehci_mxs_toggle_clock()
67 dig_offset = offsetof(struct mxs_register_32, reg_clr); in ehci_mxs_toggle_clock()
71 pll_offset = offsetof(struct mxs_register_32, reg_clr); in ehci_mxs_toggle_clock()
72 dig_offset = offsetof(struct mxs_register_32, reg_set); in ehci_mxs_toggle_clock()
/rk3399_rockchip-uboot/board/freescale/common/
H A Dqixis.h104 #define QIXIS_READ(reg) qixis_read_i2c(offsetof(struct qixis, reg))
106 qixis_write_i2c(offsetof(struct qixis, reg), value)
108 #define QIXIS_READ(reg) qixis_read(offsetof(struct qixis, reg))
109 #define QIXIS_WRITE(reg, value) qixis_write(offsetof(struct qixis, reg), value)
113 #define QIXIS_READ_I2C(reg) qixis_read_i2c(offsetof(struct qixis, reg))
115 qixis_write_i2c(offsetof(struct qixis, reg), value)
H A Dngpixis.h60 #define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg))
61 #define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value)
/rk3399_rockchip-uboot/env/
H A Deeprom.c74 off + index + offsetof(env_t, data), &c, 1); in env_eeprom_get_char()
98 off_env[i] + offsetof(env_t, crc), in env_eeprom_load()
102 off_env[i] + offsetof(env_t, flags), in env_eeprom_load()
107 off = off_env[i] + offsetof(env_t, data); in env_eeprom_load()
152 CONFIG_ENV_OFFSET + offsetof(env_t, crc), in env_eeprom_load()
157 off = offsetof(env_t, data); in env_eeprom_load()
218 off_red + offsetof(env_t, flags), in env_eeprom_save()
/rk3399_rockchip-uboot/include/
H A Dfm_eth.h77 offsetof(struct ccsr_fman, memac[n-1]),\
91 offsetof(struct ccsr_fman, memac[n-1]),\
105 offsetof(struct ccsr_fman, memac[n-1+8]),\
118 offsetof(struct ccsr_fman, memac[n-1+8]),\
134 offsetof(struct ccsr_fman, memac[n-1-2]),\
149 offsetof(struct ccsr_fman, mac_1g[n-1]),\
162 offsetof(struct ccsr_fman, mac_10g[n-1]),\
H A Dpost.h32 offsetof(ccsr_pic_t, tfrr))
37 offsetof(ccsr_pic_t, tfrr))
/rk3399_rockchip-uboot/arch/arm/mach-davinci/include/mach/
H A Dpll_defs.h78 #define ARM_PLLDIV (offsetof(struct dv_pll_regs, plldiv2))
79 #define DDR_PLLDIV (offsetof(struct dv_pll_regs, plldiv7))
80 #define SPI_PLLDIV (offsetof(struct dv_pll_regs, plldiv4))
/rk3399_rockchip-uboot/drivers/spi/
H A Dich.c129 ctlr->opmenu = offsetof(struct ich7_spi_regs, opmenu); in ich_init_controller()
131 ctlr->optype = offsetof(struct ich7_spi_regs, optype); in ich_init_controller()
132 ctlr->addr = offsetof(struct ich7_spi_regs, spia); in ich_init_controller()
133 ctlr->data = offsetof(struct ich7_spi_regs, spid); in ich_init_controller()
135 ctlr->status = offsetof(struct ich7_spi_regs, spis); in ich_init_controller()
136 ctlr->control = offsetof(struct ich7_spi_regs, spic); in ich_init_controller()
137 ctlr->bbar = offsetof(struct ich7_spi_regs, bbar); in ich_init_controller()
138 ctlr->preop = offsetof(struct ich7_spi_regs, preop); in ich_init_controller()
143 ctlr->opmenu = offsetof(struct ich9_spi_regs, opmenu); in ich_init_controller()
145 ctlr->optype = offsetof(struct ich9_spi_regs, optype); in ich_init_controller()
[all …]
/rk3399_rockchip-uboot/include/linux/
H A Dstddef.h16 #undef offsetof
17 #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) macro
/rk3399_rockchip-uboot/scripts/kconfig/
H A Dlist.h8 #undef offsetof
9 #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) macro
20 (type *)( (char *)__mptr - offsetof(type,member) );})
/rk3399_rockchip-uboot/board/freescale/t208xrdb/
H A Dcpld.h30 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
32 cpld_write(offsetof(struct cpld_data, reg), value)
/rk3399_rockchip-uboot/board/freescale/t4rdb/
H A Dcpld.h46 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
48 cpld_write(offsetof(struct cpld_data, reg), value)
/rk3399_rockchip-uboot/board/freescale/t104xrdb/
H A Dcpld.h42 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
44 cpld_write(offsetof(struct cpld_data, reg), value)
/rk3399_rockchip-uboot/board/freescale/ls1043ardb/
H A Dcpld.h35 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
37 cpld_write(offsetof(struct cpld_data, reg), value)
/rk3399_rockchip-uboot/board/freescale/t102xrdb/
H A Dcpld.h33 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
35 cpld_write(offsetof(struct cpld_data, reg), value)
/rk3399_rockchip-uboot/board/freescale/ls1046ardb/
H A Dcpld.h40 #define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
42 cpld_write(offsetof(struct cpld_data, reg), value)
/rk3399_rockchip-uboot/board/freescale/p2041rdb/
H A Dcpld.h54 #define CPLD_READ(reg) cpld_read(offsetof(cpld_data_t, reg))
55 #define CPLD_WRITE(reg, value) cpld_write(offsetof(cpld_data_t, reg), value)

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