History log of /rk3399_rockchip-uboot/arch/powerpc/include/asm/fsl_liodn.h (Results 1 – 25 of 39)
Revision Date Author Comments
# 9809ccdd 02-Sep-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx


# 97a8d010 18-Aug-2015 Igal Liberman <igal.liberman@freescale.com>

net/fman: Support both new and legacy FMan Compatibles

Recently the FMan Port and MAC compatibles were changed.
This patch aligns the FMan Port and MAC compatibles
to the new FMan device tree bindi

net/fman: Support both new and legacy FMan Compatibles

Recently the FMan Port and MAC compatibles were changed.
This patch aligns the FMan Port and MAC compatibles
to the new FMan device tree binding document.
The FMan device tree binding document can be found in the Linux kernel:
./Documentation/devicetree/bindings/powerpc/fsl/fman.txt

This patch doesn't affect legacy compatibles support.

Signed-off-by: Igal Liberman <igal.liberman@freescale.com>
Tested-by: Xing Lei <xing.lei@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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# 8968b914 01-Aug-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx


# b99b6452 14-May-2015 Shengzhou Liu <Shengzhou.Liu@freescale.com>

powerpc/t1024: update fman liodn for mac1

MAC1 acts as 1G/10G dual-role MAC on T1024. We introduce
macro SET_FMAN_RX_10G_TYPE2_LIODN for 10G MACs which have
same Port ID and same offset of address w

powerpc/t1024: update fman liodn for mac1

MAC1 acts as 1G/10G dual-role MAC on T1024. We introduce
macro SET_FMAN_RX_10G_TYPE2_LIODN for 10G MACs which have
same Port ID and same offset of address with 1G MAC.
Update it to match with the setting of fman in t1024 device
tree, otherwise there is no 'fsl,liodn' in
/proc/device-tree/soc@ffe000000/fman@400000/port@88000/

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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# 272a1acf 08-Dec-2014 Tom Rini <trini@ti.com>

Merge git://git.denx.de/u-boot-mpc85xx


# 8d3eaa97 20-Nov-2014 Tudor Laurentiu <b10716@freescale.com>

powerpc/mpc85xx: use correct dma compatible for several SoCs

Newer qoriq socs have an updated dma ip block with a
different compatible. Let's make sure we use the proper
string so that the dmas get

powerpc/mpc85xx: use correct dma compatible for several SoCs

Newer qoriq socs have an updated dma ip block with a
different compatible. Let's make sure we use the proper
string so that the dmas get their liodn.
In order to have the means to specify the compatible
string, the liodn setting macros were updated to receive
a new parameter for it.
The following SoCs were changed to use the new compatible:
T1023/4, T1040, T2080/1, T4240, B4860.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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# dab5e346 16-Jul-2014 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Conflicts:
boards.cfg


# ed1d98d8 25-Jun-2014 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into 'u-boot-arm/master'


# 3e1fa221 05-Jun-2014 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx


# 377ffcfa 05-Jun-2014 Sandeep Singh <sandeep@freescale.com>

powerpc/mpc85xx: Add workaround to enable TDM on T1040

This is a workaround for 32 bit hardware limitation of TDM.
T1040 has 36 bit physical addressing, TDM DMAC register
are 32 bit wide but need to

powerpc/mpc85xx: Add workaround to enable TDM on T1040

This is a workaround for 32 bit hardware limitation of TDM.
T1040 has 36 bit physical addressing, TDM DMAC register
are 32 bit wide but need to store address of CCSR space
which lies beyond 32 bit address range. This workaround
creats a LAW to enable access of TDM DMA to CCSR by
mapping CCSR to overlap with DDR.
A hole of 16M is created in memory using device tree. This
workaround law is set only if "tdm" is defined in hwconfig.
Also disable POST tests and add LIODN for TDM

Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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# e7f93505 15-May-2014 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-arm


# d2a3e911 09-May-2014 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master'

Conflicts:
drivers/net/Makefile

(trivial merge)


# 080d8975 25-Apr-2014 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx


# 2a44efeb 21-Mar-2014 Zhao Qiang <B45475@freescale.com>

QE/U-QE: Add U-QE support

Modify code to adapt to both u-qe and qe.

U_QE is a kind of cutted QE.
the differences between U_QE and QE
1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs.
2

QE/U-QE: Add U-QE support

Modify code to adapt to both u-qe and qe.

U_QE is a kind of cutted QE.
the differences between U_QE and QE
1. UCC: U_QE supports 2 UCCs while QE supports up to 8 UCCs.
2. IMMR: have different immr base addr.
3. iopin: U_QE doesn't need to config iopin.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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# b98d9341 13-Aug-2013 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx


# b3831020 25-Jun-2013 Liu Gang <Gang.Liu@freescale.com>

powerpc/srio: Update the SRIO LIODN registers and ID table macro

For some PowerPC platforms, LIODN registers for SRIO ports are
in SRIO register address space. So the ccsr_rio structure should
be up

powerpc/srio: Update the SRIO LIODN registers and ID table macro

For some PowerPC platforms, LIODN registers for SRIO ports are
in SRIO register address space. So the ccsr_rio structure should
be updated for those LIODN registers.

In addition, add a new macro "SET_SRIO_LIODN_BASE" to create
the SRIO LIODN ID table based on the SRIO LIODN register address.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>

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# 326ea986 31-Jul-2013 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <s

Merge git://git.denx.de/u-boot-arm

Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

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# 8b485ba1 25-Jul-2013 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge branch 'u-boot/master' into u-boot-arm/master


# 1a459660 08-Jul-2013 Wolfgang Denk <wd@denx.de>

Add GPL-2.0+ SPDX-License-Identifier to source files

Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>


# 3e4d27b0 10-Nov-2012 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot


# c7656bab 22-Oct-2012 Tom Rini <trini@ti.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx


# f311838d 08-Oct-2012 Andy Fleming <afleming@freescale.com>

powerpc/mpc85xx: Add T4 device definitions

The T4 has added devices to previous corenet implementations:

* SEC has 3 more DECO units
* New PMAN device
* New DCE device

This doesn't add full suppor

powerpc/mpc85xx: Add T4 device definitions

The T4 has added devices to previous corenet implementations:

* SEC has 3 more DECO units
* New PMAN device
* New DCE device

This doesn't add full support for the new devices. Just some
preliminary support.

Move PMAN LIODN to upper half of register

Despite having only one LIODN, the PMAN LIODN is stored in the
upper half of the register. Re-use the 2-LIODN code and just
set the LIODN as if the second one is 0. This results in the
actual LIODN being written to the upper half of the register.

Signed-off-by: Andy Fleming <afleming@freescale.com>

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# fd946040 05-Oct-2012 Timur Tabi <timur@freescale.com>

powerpc/85xx: define SRIO LIODN functions only if SRIO is defined

The P5040 does not have SRIO support, so there are no SRIO LIODNs.
Therefore, the functions that set the SRIO LIODNs should not be c

powerpc/85xx: define SRIO LIODN functions only if SRIO is defined

The P5040 does not have SRIO support, so there are no SRIO LIODNs.
Therefore, the functions that set the SRIO LIODNs should not be compiled.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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# e389a377 05-Oct-2012 Laurentiu Tudor <Laurentiu.Tudor@freescale.com>

powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs

The liodn for the new PCIE controller included in P5040DS is no longer set
through a register in the guts register block but with o

powerpc/85xx: introduce SET_PCI_LIODN_BASE, for setting PCI LIODNs

The liodn for the new PCIE controller included in P5040DS is no longer set
through a register in the guts register block but with one in the PCIE
register block itself. Update the PCIE CCSR structure to add the new liodn
register and add a new dedicated SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.

Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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# 02aff558 21-Oct-2011 Wolfgang Denk <wd@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: Add inline GPIO acessor functions
powerpc/85xx: wait for alignment before reset

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
mpc85xx: Add inline GPIO acessor functions
powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)
powerpc/85xx: Fix P2020DS booting
powerpc/85xx: Update USB device tree status based on pin settings
fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers
powerpc/85xx: Add support for RMan LIODN initialization
powerpc/85xx: Update device tree handling for SRIO
powerpc/85xx: Update setting of SRIO LIODNs
fm: Don't allow disabling of FM1-DTSEC1
fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree

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