1660673afSXiubo Li /* 2660673afSXiubo Li * Copyright 2014 Freescale Semiconductor, Inc. 3660673afSXiubo Li * 4660673afSXiubo Li * SPDX-License-Identifier: GPL-2.0+ 5660673afSXiubo Li */ 6660673afSXiubo Li 7660673afSXiubo Li #ifndef __FSL_LS102XA_STREAM_ID_H_ 8660673afSXiubo Li #define __FSL_LS102XA_STREAM_ID_H_ 9660673afSXiubo Li 10*8133574eSAlison Wang #include <fsl_sec.h> 11*8133574eSAlison Wang 12*8133574eSAlison Wang #define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \ 13*8133574eSAlison Wang { .compat = name, \ 14*8133574eSAlison Wang .id = { idA }, .num_ids = 1, \ 15*8133574eSAlison Wang .reg_offset = off + CONFIG_SYS_IMMR, \ 16*8133574eSAlison Wang .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ 17*8133574eSAlison Wang } 18*8133574eSAlison Wang 19*8133574eSAlison Wang #define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \ 20*8133574eSAlison Wang { .compat = name, \ 21*8133574eSAlison Wang .id = { idA, idB }, .num_ids = 2, \ 22*8133574eSAlison Wang .reg_offset = off + CONFIG_SYS_IMMR, \ 23*8133574eSAlison Wang .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \ 24*8133574eSAlison Wang } 25*8133574eSAlison Wang 26*8133574eSAlison Wang /* 27*8133574eSAlison Wang * handle both old and new versioned SEC properties: 28*8133574eSAlison Wang * "fsl,secX.Y" became "fsl,sec-vX.Y" during development 29*8133574eSAlison Wang */ 30*8133574eSAlison Wang #define SET_SEC_JR_LIODN_ENTRY(jrnum, liodnA, liodnB) \ 31*8133574eSAlison Wang SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB, \ 32*8133574eSAlison Wang offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \ 33*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET, \ 34*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum), \ 35*8133574eSAlison Wang SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\ 36*8133574eSAlison Wang offsetof(ccsr_sec_t, jrliodnr[jrnum].ls) + \ 37*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET, \ 38*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrnum) 39*8133574eSAlison Wang 40*8133574eSAlison Wang /* This is a bit evil since we treat rtic param as both a string & hex value */ 41*8133574eSAlison Wang #define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \ 42*8133574eSAlison Wang SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \ 43*8133574eSAlison Wang liodnA, \ 44*8133574eSAlison Wang offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ 45*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET, \ 46*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \ 47*8133574eSAlison Wang SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \ 48*8133574eSAlison Wang liodnA, \ 49*8133574eSAlison Wang offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \ 50*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET, \ 51*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)) 52*8133574eSAlison Wang 53*8133574eSAlison Wang #define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \ 54*8133574eSAlison Wang SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \ 55*8133574eSAlison Wang offsetof(ccsr_sec_t, decoliodnr[num].ls) + \ 56*8133574eSAlison Wang CONFIG_SYS_FSL_SEC_OFFSET, 0) 57*8133574eSAlison Wang 58*8133574eSAlison Wang struct liodn_id_table { 59*8133574eSAlison Wang const char *compat; 60*8133574eSAlison Wang u32 id[2]; 61*8133574eSAlison Wang u8 num_ids; 62*8133574eSAlison Wang phys_addr_t compat_offset; 63*8133574eSAlison Wang unsigned long reg_offset; 64*8133574eSAlison Wang }; 65*8133574eSAlison Wang 66660673afSXiubo Li struct smmu_stream_id { 67660673afSXiubo Li uint16_t offset; 68660673afSXiubo Li uint16_t stream_id; 69660673afSXiubo Li char dev_name[32]; 70660673afSXiubo Li }; 71660673afSXiubo Li 72*8133574eSAlison Wang void ls1021x_config_caam_stream_id(struct liodn_id_table *tbl, int size); 73660673afSXiubo Li void ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num); 74660673afSXiubo Li #endif 75