| /rk3399_rockchip-uboot/drivers/clk/uniphier/ |
| H A D | clk-uniphier-core.c | 93 ulong best_rate = 0; in uniphier_clk_set_rate() local
104 if (mux->rates[i] > best_rate && mux->rates[i] <= rate) { in uniphier_clk_set_rate()
105 best_rate = mux->rates[i]; in uniphier_clk_set_rate()
119 rate, best_rate); in uniphier_clk_set_rate()
121 return best_rate; in uniphier_clk_set_rate()
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| /rk3399_rockchip-uboot/drivers/clk/at91/ |
| H A D | clk-generated.c | 82 ulong tmp_rate, best_rate = rate, parent_rate; in generic_clk_set_rate() local
106 best_rate = tmp_rate; in generic_clk_set_rate()
123 best_parent.dev->name, best_rate, best_div); in generic_clk_set_rate()
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3576.c | 1176 ulong pll_rate, now, best_rate = 0; in rk3576_dclk_vop_set_clk() local
1261 if (abs(rate - now) < abs(rate - best_rate)) { in rk3576_dclk_vop_set_clk()
1262 best_rate = now; in rk3576_dclk_vop_set_clk()
1267 pll_rate, best_rate, best_div, best_sel); in rk3576_dclk_vop_set_clk()
1270 if (best_rate) { in rk3576_dclk_vop_set_clk()
1318 ulong pll_rate, now, best_rate = 0; in rk3576_clk_csihost_set_clk() local
1361 if (abs(rate - now) < abs(rate - best_rate)) { in rk3576_clk_csihost_set_clk()
1362 best_rate = now; in rk3576_clk_csihost_set_clk()
1367 pll_rate, best_rate, best_div, best_sel); in rk3576_clk_csihost_set_clk()
1369 if (best_rate) { in rk3576_clk_csihost_set_clk()
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| H A D | clk_rk3308.c | 564 ulong pll_rate, now, best_rate = 0; in rk3308_vop_set_clk() local
587 if (abs(hz - now) < abs(hz - best_rate)) { in rk3308_vop_set_clk()
588 best_rate = now; in rk3308_vop_set_clk()
593 pll_rate, best_rate, best_div, best_sel); in rk3308_vop_set_clk()
596 if (best_rate != hz && hz == OSC_HZ) { in rk3308_vop_set_clk()
600 } else if (best_rate) { in rk3308_vop_set_clk()
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| H A D | clk_rk3368.c | 340 ulong best_rate = 0; in rk3368_mmc_find_best_rate_and_parent() local
370 if (new_rate <= best_rate) in rk3368_mmc_find_best_rate_and_parent()
374 best_rate = new_rate; in rk3368_mmc_find_best_rate_and_parent()
380 __func__, *best_mux, *best_div, best_rate); in rk3368_mmc_find_best_rate_and_parent()
382 return best_rate; in rk3368_mmc_find_best_rate_and_parent()
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| H A D | clk_rk3562.c | 1178 ulong pll_rate, now, best_rate = 0; in rk3562_vop_set_rate() local
1233 if (abs(rate - now) < abs(rate - best_rate)) { in rk3562_vop_set_rate()
1234 best_rate = now; in rk3562_vop_set_rate()
1239 pll_rate, best_rate, best_div, best_sel); in rk3562_vop_set_rate()
1241 if (best_rate) { in rk3562_vop_set_rate()
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| H A D | clk_rv1126.c | 1223 ulong pll_rate, now, best_rate = 0; in rv1126_dclk_vop_set_clk() local
1243 if (abs(rate - now) < abs(rate - best_rate)) { in rv1126_dclk_vop_set_clk()
1244 best_rate = now; in rv1126_dclk_vop_set_clk()
1249 pll_rate, best_rate, best_div, best_sel); in rv1126_dclk_vop_set_clk()
1252 if (best_rate) { in rv1126_dclk_vop_set_clk()
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| H A D | clk_rk3588.c | 1113 ulong pll_rate, now, best_rate = 0; in rk3588_dclk_vop_set_clk() local
1201 if (abs(rate - now) < abs(rate - best_rate)) { in rk3588_dclk_vop_set_clk()
1202 best_rate = now; in rk3588_dclk_vop_set_clk()
1207 pll_rate, best_rate, best_div, best_sel); in rk3588_dclk_vop_set_clk()
1210 if (best_rate) { in rk3588_dclk_vop_set_clk()
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| H A D | clk_rk3568.c | 1824 ulong pll_rate, now, best_rate = 0; in rk3568_dclk_vop_set_clk() local
1882 if (abs(rate - now) < abs(rate - best_rate)) { in rk3568_dclk_vop_set_clk()
1883 best_rate = now; in rk3568_dclk_vop_set_clk()
1888 pll_rate, best_rate, best_div, best_sel); in rk3568_dclk_vop_set_clk()
1891 if (best_rate) { in rk3568_dclk_vop_set_clk()
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| /rk3399_rockchip-uboot/drivers/clk/ |
| H A D | clk_zynq.c | 293 ulong new_rate, best_rate = 0; in zynq_clk_calc_peripheral_two_divs() local
306 best_rate = new_rate; in zynq_clk_calc_peripheral_two_divs()
311 return best_rate; in zynq_clk_calc_peripheral_two_divs()
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| H A D | clk_zynqmp.c | 428 ulong new_rate, best_rate = 0; in zynqmp_clk_calc_peripheral_two_divs() local
441 best_rate = new_rate; in zynqmp_clk_calc_peripheral_two_divs()
446 return best_rate; in zynqmp_clk_calc_peripheral_two_divs()
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