| #
fe84c48e |
| 04-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.09
Zynq:
- Add Z-Turn board support
fpga:
- Remove intermediate buffer from code
Zynqmp:
- dts
Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.09
Zynq:
- Add Z-Turn board support
fpga:
- Remove intermediate buffer from code
Zynqmp:
- dts cleanup
- change psu_init handling
- Add options to get silicon version
- Fix time handling
- Map OCM/TCM via MMU
- Add new clock driver
show more ...
|
| #
cf772e96 |
| 24-Apr-2017 |
Michal Simek <michal.simek@xilinx.com> |
clk: zynqmp: Remove unused macros/variables
These macros and one variable is not used anywhere that's why
they should be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by:
clk: zynqmp: Remove unused macros/variables
These macros and one variable is not used anywhere that's why
they should be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
154799ac |
| 13-Apr-2017 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
clk: zynqmp: Dont panic incase of mmio write/read failures
Dont panic incase of mmio write/read failures instead return
error and let the peripheral driver take care of clock get
and set failures.
clk: zynqmp: Dont panic incase of mmio write/read failures
Dont panic incase of mmio write/read failures instead return
error and let the peripheral driver take care of clock get
and set failures.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
ad76f8ce |
| 03-Feb-2017 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
clk: zynqmp: Add support for CCF driver
Add support for CCF, this CCF reads the ref clocks
from dt and checks all the required clock control
registers for its source , divisors and calculates
the cl
clk: zynqmp: Add support for CCF driver
Add support for CCF, this CCF reads the ref clocks
from dt and checks all the required clock control
registers for its source , divisors and calculates
the clock from them. This supports clock and set
functions.
Panic when read/write fails.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
9d922450 |
| 17-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
S
dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
5b30997f |
| 11-Jan-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.03
- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driv
Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.03
- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driver for ZynqMP
- Other small changes
show more ...
|
| #
128ec1fe |
| 15-Nov-2016 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
clk: zynqmp: Add clock driver support for zynqmp
Add basic clock driver support for zynqmp which
sets the required clock for GEM controller
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx
clk: zynqmp: Add clock driver support for zynqmp
Add basic clock driver support for zynqmp which
sets the required clock for GEM controller
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|