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Searched refs:PLL_NPLL (Results 1 – 21 of 21) sorted by relevance

/rk3399_rockchip-uboot/include/dt-bindings/clock/
H A Dpx30-cru.h23 #define PLL_NPLL 4 macro
H A Drk3328-cru.h15 #define PLL_NPLL 5 macro
H A Drk3288-cru.h13 #define PLL_NPLL 5 macro
H A Drk3368-cru.h24 #define PLL_NPLL 6 macro
H A Drk1808-cru.h11 #define PLL_NPLL 5 macro
H A Drk3399-cru.h18 #define PLL_NPLL 6 macro
H A Drk3568-cru.h75 #define PLL_NPLL 6 macro
H A Drk3588-cru.h20 #define PLL_NPLL 8 macro
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3328.c94 RK3328_CLK_DUMP(PLL_NPLL, "npll", true),
114 [NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3328_PLL_CON(40),
804 case PLL_NPLL: in rk3328_clk_get_rate()
875 case PLL_NPLL: in rk3328_clk_set_rate()
H A Dclk_rk1808.c62 RK1808_CLK_DUMP(PLL_NPLL, "npll", true),
88 [NPLL] = PLL(pll_rk3036, PLL_NPLL, RK1808_PLL_CON(32),
917 case PLL_NPLL: in rk1808_clk_get_rate()
1020 case PLL_NPLL: in rk1808_clk_set_rate()
H A Dclk_rk3368.c78 RK3368_CLK_DUMP(PLL_NPLL, "npll", true),
940 case PLL_NPLL: in rk3368_clk_get_rate()
1009 case PLL_NPLL: in rk3368_clk_set_rate()
H A Dclk_rk3288.c71 RK3288_CLK_DUMP(PLL_NPLL, "npll", true),
1228 case PLL_NPLL: in rk3288_clk_set_rate()
1415 case PLL_NPLL: in rk3288_vop_set_parent()
H A Dclk_rk3399.c82 RK3399_CLK_DUMP(PLL_NPLL, "npll", true),
431 case PLL_NPLL: in rk3399_pll_get_rate()
1152 case PLL_NPLL: in rk3399_clk_get_rate()
H A Dclk_rk3588.c64 [NPLL] = PLL(pll_rk3588, PLL_NPLL, RK3588_PLL_CON(120),
86 RK3588_CLK_DUMP(PLL_NPLL, "npll", true),
1575 case PLL_NPLL: in rk3588_clk_get_rate()
1722 case PLL_NPLL: in rk3588_clk_set_rate()
H A Dclk_px30.c75 PX30_CLK_DUMP(PLL_NPLL, "npll", true),
1311 case PLL_NPLL: in px30_clk_get_rate()
1396 case PLL_NPLL: in px30_clk_set_rate()
H A Dclk_rk3568.c76 [NPLL] = PLL(pll_rk3328, PLL_NPLL, RK3568_PLL_CON(32),
99 RK3568_CLK_DUMP(PLL_NPLL, "npll", true),
2541 case PLL_NPLL: in rk3568_clk_get_rate()
2728 case PLL_NPLL: in rk3568_clk_set_rate()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3288.dtsi651 <&cru PLL_NPLL>, <&cru ACLK_CPU>,
H A Dpx30.dtsi700 <&cru PLL_NPLL>, <&cru PLL_CPLL>,
H A Drk3399.dtsi1269 <&cru PLL_NPLL>,
H A Drk3588s.dtsi516 <&cru PLL_NPLL>, <&cru PLL_GPLL>,
H A Drk3568.dtsi569 <&cru PLL_NPLL>;