Home
last modified time | relevance | path

Searched refs:PLL_GPLL (Results 1 – 25 of 60) sorted by relevance

123

/rk3399_rockchip-uboot/include/dt-bindings/clock/
H A Drk3036-cru.h14 #define PLL_GPLL 3 macro
H A Drk3188-cru-common.h15 #define PLL_GPLL 4 macro
H A Drk3128-cru.h14 #define PLL_GPLL 4 macro
H A Drk3228-cru.h14 #define PLL_GPLL 4 macro
H A Drv1108-cru.h13 #define PLL_GPLL 2 macro
H A Dpx30-cru.h189 #define PLL_GPLL 1 macro
H A Drk3328-cru.h14 #define PLL_GPLL 4 macro
H A Drk3288-cru.h12 #define PLL_GPLL 4 macro
H A Drk3368-cru.h23 #define PLL_GPLL 5 macro
H A Drk1808-cru.h10 #define PLL_GPLL 4 macro
H A Drockchip,rk3506-cru.h11 #define PLL_GPLL 1 macro
H A Drockchip,rv1103b-cru.h11 #define PLL_GPLL 1 macro
H A Drv1106-cru.h14 #define PLL_GPLL 4 macro
H A Drv1126-cru.h13 #define PLL_GPLL 1 macro
H A Drk3562-cru.h14 #define PLL_GPLL 2 macro
H A Drk3528-cru.h15 #define PLL_GPLL 3 macro
H A Drk3399-cru.h17 #define PLL_GPLL 5 macro
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3128.c69 RK3128_CLK_DUMP(PLL_GPLL, "gpll", true),
87 [GPLL] = PLL(pll_rk3036, PLL_GPLL, RK2928_PLL_CON(12),
538 case PLL_GPLL: in rk3128_clk_get_rate()
604 case PLL_GPLL: in rk3128_clk_set_rate()
H A Dclk_rv1103b.c40 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1103B_PLL_CON(24),
53 RV1103B_CLK_DUMP(PLL_GPLL, "gpll", true),
811 case PLL_GPLL: in rv1103b_clk_get_rate()
897 case PLL_GPLL: in rv1103b_clk_set_rate()
H A Dclk_rk322x.c70 RK322x_CLK_DUMP(PLL_GPLL, "gpll", true),
88 [GPLL] = PLL(pll_rk3036, PLL_GPLL, RK2928_PLL_CON(9),
585 case PLL_GPLL: in rk322x_clk_get_rate()
653 case PLL_GPLL: in rk322x_clk_set_rate()
H A Dclk_rk3328.c93 RK3328_CLK_DUMP(PLL_GPLL, "gpll", true),
112 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RK3328_PLL_CON(24),
803 case PLL_GPLL: in rk3328_clk_get_rate()
884 case PLL_GPLL: in rk3328_clk_set_rate()
H A Dclk_rk1808.c61 RK1808_CLK_DUMP(PLL_GPLL, "gpll", true),
86 [GPLL] = PLL(pll_rk3036, PLL_GPLL, RK1808_PLL_CON(24),
916 case PLL_GPLL: in rk1808_clk_get_rate()
1014 case PLL_GPLL: in rk1808_clk_set_rate()
H A Dclk_rv1106.c45 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RV1106_PLL_CON(24),
62 RV1106_CLK_DUMP(PLL_GPLL, "gpll", true),
1063 case PLL_GPLL: in rv1106_clk_get_rate()
1164 case PLL_GPLL: in rv1106_clk_set_rate()
H A Dclk_rk3576.c77 [GPLL] = PLL(pll_rk3588, PLL_GPLL, RK3576_PLL_CON(112),
97 RK3576_CLK_DUMP(PLL_GPLL, "gpll", true),
2078 case PLL_GPLL: in rk3576_clk_get_rate()
2242 case PLL_GPLL: in rk3576_clk_set_rate()
2395 else if (parent->id == PLL_GPLL) in rk3576_dclk_vop_set_parent()
2442 if (parent->id == PLL_GPLL) in rk3576_dclk_vop_set_parent()
H A Dclk_rk3506.c67 [GPLL] = PLL(pll_rk3328, PLL_GPLL, RK3506_PLL_CON(0),
101 RK3506_CLK_DUMP(PLL_GPLL, "gpll"),
1029 case PLL_GPLL: in rk3506_clk_get_rate()

123