| /rk3399_rockchip-uboot/board/xes/xpedite537x/ |
| H A D | tlb.c | 76 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/xes/xpedite550x/ |
| H A D | tlb.c | 76 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/include/configs/ |
| H A D | xpedite517x.h | 292 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000 macro
407 #define CONFIG_SYS_DBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
411 #define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCIE1_IO_PHYS |\
415 #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS |\
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| H A D | controlcenterd.h | 239 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull macro
241 #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 macro
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| H A D | sbc8641d.h | 275 #define CONFIG_SYS_PCIE1_IO_PHYS CONFIG_SYS_PCIE1_IO_BUS macro
405 #define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW \
408 #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
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| H A D | MPC8548CDS.h | 370 #define CONFIG_SYS_PCIE1_IO_PHYS 0xfe3000000ull macro
372 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000 macro
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| H A D | cyrus.h | 266 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
268 #define CONFIG_SYS_PCIE1_IO_PHYS 0xf8000000 macro
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| H A D | t4qds.h | 172 #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull macro
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| /rk3399_rockchip-uboot/board/freescale/mpc8548cds/ |
| H A D | tlb.c | 82 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/mpc8308_p1m/ |
| H A D | mpc8308_p1m.c | 37 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/p1_twr/ |
| H A D | tlb.c | 60 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/gdsys/p1022/ |
| H A D | tlb.c | 62 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/c29xpcie/ |
| H A D | tlb.c | 43 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/Arcturus/ucp1020/ |
| H A D | tlb.c | 58 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/p1010rdb/ |
| H A D | tlb.c | 61 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/bsc9132qds/ |
| H A D | tlb.c | 66 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/varisys/cyrus/ |
| H A D | tlb.c | 76 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/keymile/kmp204x/ |
| H A D | tlb.c | 59 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/t1040qds/ |
| H A D | tlb.c | 62 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/mpc837xerdb/ |
| H A D | pci.c | 42 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/t102xqds/ |
| H A D | tlb.c | 63 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/p1_p2_rdb_pc/ |
| H A D | tlb.c | 54 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/t102xrdb/ |
| H A D | tlb.c | 63 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/mpc8308rdb/ |
| H A D | mpc8308rdb.c | 101 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
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| /rk3399_rockchip-uboot/board/freescale/t4rdb/ |
| H A D | tlb.c | 72 SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
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