| /rk3399_ARM-atf/plat/imx/common/ |
| H A D | imx8_psci.c | 33 psci_power_state_t *req_state) in imx_validate_power_state() argument 43 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state() 47 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 53 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 59 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in imx_get_sys_suspend_power_state() 60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_pm.c | 25 psci_power_state_t *req_state) in arm_validate_power_state() argument 31 assert(req_state != NULL); in arm_validate_power_state() 45 req_state->pwr_domain_state[ARM_PWR_LVL0] = in arm_validate_power_state() 49 req_state->pwr_domain_state[i] = in arm_validate_power_state() 60 req_state->last_at_pwrlvl = psci_get_pstate_pwrlvl(power_state); in arm_validate_power_state() 73 psci_power_state_t *req_state) in arm_validate_power_state() argument 78 assert(req_state != NULL); in arm_validate_power_state() 100 req_state->pwr_domain_state[i] = state_id & in arm_validate_power_state() 105 req_state->last_at_pwrlvl = state_id & ARM_LOCAL_PSTATE_MASK; in arm_validate_power_state()
|
| /rk3399_ARM-atf/plat/imx/imx8m/imx8mq/ |
| H A D | imx8mq_psci.c | 22 psci_power_state_t *req_state) in imx_validate_power_state() argument 32 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 33 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 37 CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 38 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 121 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 126 req_state->pwr_domain_state[i] = PLAT_STOP_OFF_STATE; in imx_get_sys_suspend_power_state() 128 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/imx/imx93/ |
| H A D | imx93_psci.c | 39 psci_power_state_t *req_state) in imx_validate_power_state() argument 50 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 51 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 55 CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 56 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 191 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 196 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in imx_get_sys_suspend_power_state() 199 SYSTEM_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state() 200 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/allwinner/common/ |
| H A D | sunxi_scpi_pm.c | 147 psci_power_state_t *req_state) in sunxi_validate_power_state() argument 154 assert(req_state != NULL); in sunxi_validate_power_state() 168 req_state->pwr_domain_state[i] = local_pstate; in sunxi_validate_power_state() 174 req_state->pwr_domain_state[i] = PSCI_LOCAL_STATE_RUN; in sunxi_validate_power_state() 180 static void sunxi_get_sys_suspend_power_state(psci_power_state_t *req_state) in sunxi_get_sys_suspend_power_state() argument 182 assert(req_state != NULL); in sunxi_get_sys_suspend_power_state() 185 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in sunxi_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/imx/imx8m/ |
| H A D | imx8m_psci_common.c | 70 psci_power_state_t *req_state) in imx_validate_power_state() argument 80 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 81 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 85 CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 86 CLUSTER_PWR_STATE(req_state) = PLAT_WAIT_RET_STATE; in imx_validate_power_state() 155 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 160 req_state->pwr_domain_state[i] = PLAT_STOP_OFF_STATE; in imx_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/hisilicon/poplar/ |
| H A D | plat_pm.c | 114 psci_power_state_t *req_state) in poplar_validate_power_state() argument 120 assert(req_state); in poplar_validate_power_state() 124 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in poplar_validate_power_state() 126 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in poplar_validate_power_state() 147 static void poplar_get_sys_suspend_power_state(psci_power_state_t *req_state) in poplar_get_sys_suspend_power_state() argument 152 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in poplar_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/xilinx/zynqmp/ |
| H A D | plat_psci.c | 214 psci_power_state_t *req_state) in zynqmp_validate_power_state() argument 221 assert(req_state); in zynqmp_validate_power_state() 225 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state() 227 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in zynqmp_validate_power_state() 237 static void zynqmp_get_sys_suspend_power_state(psci_power_state_t *req_state) in zynqmp_get_sys_suspend_power_state() argument 239 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in zynqmp_get_sys_suspend_power_state() 240 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in zynqmp_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/qti/common/src/ |
| H A D | qti_pm.c | 84 psci_power_state_t *req_state) in qti_validate_power_state() argument 89 assert(req_state); in qti_validate_power_state() 115 req_state->pwr_domain_state[i] = state_id & in qti_validate_power_state() 120 req_state->last_at_pwrlvl = state_id & QTI_LOCAL_PSTATE_MASK; in qti_validate_power_state() 235 void qti_get_sys_suspend_power_state(psci_power_state_t *req_state) in qti_get_sys_suspend_power_state() argument 251 req_state->pwr_domain_state[i++] = in qti_get_sys_suspend_power_state() 257 req_state->last_at_pwrlvl = PLAT_MAX_PWR_LVL; in qti_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/renesas/rcar_gen4/ |
| H A D | plat_pm.c | 159 psci_power_state_t *req_state) in rcar_validate_power_state() argument 169 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in rcar_validate_power_state() 172 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_validate_power_state() 181 static void rcar_get_sys_suspend_power_state(psci_power_state_t *req_state) in rcar_get_sys_suspend_power_state() argument 188 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = in rcar_get_sys_suspend_power_state() 192 req_state->pwr_domain_state[i] = PLAT_MAX_RET_STATE; in rcar_get_sys_suspend_power_state() 195 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/xilinx/versal/ |
| H A D | plat_psci.c | 276 psci_power_state_t *req_state) in versal_validate_power_state() argument 283 assert(req_state != NULL); in versal_validate_power_state() 287 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state() 289 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in versal_validate_power_state() 305 static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state) in versal_get_sys_suspend_power_state() argument 307 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; in versal_get_sys_suspend_power_state() 308 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; in versal_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/imx/imx9/common/ |
| H A D | imx9_psci_common.c | 46 psci_power_state_t *req_state) in imx_validate_power_state() argument 57 CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 58 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 62 CORE_PWR_STATE(req_state) = PLAT_MAX_OFF_STATE; in imx_validate_power_state() 63 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state() 265 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state) in imx_get_sys_suspend_power_state() argument 270 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in imx_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/nvidia/tegra/common/ |
| H A D | tegra_pm.c | 37 static void tegra_get_sys_suspend_power_state(psci_power_state_t *req_state) in tegra_get_sys_suspend_power_state() argument 41 req_state->pwr_domain_state[i] = PSTATE_ID_SOC_POWERDN; in tegra_get_sys_suspend_power_state() 250 psci_power_state_t *req_state) in tegra_validate_power_state() argument 252 assert(req_state != NULL); in tegra_validate_power_state() 254 return tegra_soc_validate_power_state(power_state, req_state); in tegra_validate_power_state()
|
| /rk3399_ARM-atf/plat/hisilicon/hikey/ |
| H A D | hikey_pm.c | 163 static void hikey_get_sys_suspend_power_state(psci_power_state_t *req_state) in hikey_get_sys_suspend_power_state() argument 168 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey_get_sys_suspend_power_state() 215 psci_power_state_t *req_state) in hikey_validate_power_state() argument 221 assert(req_state); in hikey_validate_power_state() 235 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in hikey_validate_power_state() 239 req_state->pwr_domain_state[i] = in hikey_validate_power_state()
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_pm.c | 346 static void fvp_get_sys_suspend_power_state(psci_power_state_t *req_state) in fvp_get_sys_suspend_power_state() argument 351 req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF; in fvp_get_sys_suspend_power_state() 354 req_state->last_at_pwrlvl = PLAT_MAX_PWR_LVL; in fvp_get_sys_suspend_power_state() 368 psci_power_state_t *req_state) in fvp_validate_power_state() argument 371 rc = arm_validate_power_state(power_state, req_state); in fvp_validate_power_state() 378 req_state->pwr_domain_state[ARM_PWR_LVL2] = ARM_LOCAL_STATE_RUN; in fvp_validate_power_state()
|
| /rk3399_ARM-atf/plat/rockchip/common/ |
| H A D | plat_pm.c | 131 psci_power_state_t *req_state) in rockchip_validate_power_state() argument 137 assert(req_state); in rockchip_validate_power_state() 151 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in rockchip_validate_power_state() 155 req_state->pwr_domain_state[i] = in rockchip_validate_power_state() 159 req_state->pwr_domain_state[i] = in rockchip_validate_power_state() 170 void rockchip_get_sys_suspend_power_state(psci_power_state_t *req_state) in rockchip_get_sys_suspend_power_state() argument 175 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rockchip_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/renesas/common/ |
| H A D | plat_pm.c | 255 psci_power_state_t *req_state) in rcar_validate_power_state() argument 265 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in rcar_validate_power_state() 268 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_validate_power_state() 278 static void rcar_get_sys_suspend_power_state(psci_power_state_t *req_state) in rcar_get_sys_suspend_power_state() argument 287 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_get_sys_suspend_power_state() 292 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PSCI_LOCAL_STATE_RUN; in rcar_get_sys_suspend_power_state() 294 req_state->pwr_domain_state[i] = PLAT_MAX_RET_STATE; in rcar_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/mediatek/mt8173/ |
| H A D | plat_pm.c | 434 static void plat_get_sys_suspend_power_state(psci_power_state_t *req_state) in plat_get_sys_suspend_power_state() argument 439 req_state->pwr_domain_state[i] = MTK_LOCAL_STATE_OFF; in plat_get_sys_suspend_power_state() 470 psci_power_state_t *req_state) in plat_validate_power_state() argument 476 assert(req_state); in plat_validate_power_state() 490 req_state->pwr_domain_state[MTK_PWR_LVL0] = in plat_validate_power_state() 494 req_state->pwr_domain_state[i] = in plat_validate_power_state() 508 psci_power_state_t *req_state) in plat_validate_power_state() argument 513 assert(req_state); in plat_validate_power_state() 534 req_state->pwr_domain_state[i++] = state_id & in plat_validate_power_state()
|
| /rk3399_ARM-atf/plat/imx/common/include/ |
| H A D | plat_imx8.h | 29 psci_power_state_t *req_state); 30 void imx_get_sys_suspend_power_state(psci_power_state_t *req_state);
|
| /rk3399_ARM-atf/plat/arm/css/common/ |
| H A D | css_pm.c | 252 void css_get_sys_suspend_power_state(psci_power_state_t *req_state) in css_get_sys_suspend_power_state() argument 263 req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF; in css_get_sys_suspend_power_state() 280 psci_power_state_t *req_state) in css_validate_power_state() argument 283 rc = arm_validate_power_state(power_state, req_state); in css_validate_power_state() 299 req_state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL] = in css_validate_power_state()
|
| /rk3399_ARM-atf/plat/renesas/rcar_gen5/ |
| H A D | plat_pm.c | 163 psci_power_state_t *req_state) in rcar_validate_power_state() argument 174 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in rcar_validate_power_state() 177 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_validate_power_state() 188 static void rcar_get_sys_suspend_power_state(psci_power_state_t *req_state) in rcar_get_sys_suspend_power_state() argument 193 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in rcar_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/hisilicon/hikey960/ |
| H A D | hikey960_pm.c | 139 psci_power_state_t *req_state) in hikey960_validate_power_state() argument 145 assert(req_state); in hikey960_validate_power_state() 159 req_state->pwr_domain_state[MPIDR_AFFLVL0] = in hikey960_validate_power_state() 163 req_state->pwr_domain_state[i] = in hikey960_validate_power_state() 289 static void hikey960_get_sys_suspend_power_state(psci_power_state_t *req_state) in hikey960_get_sys_suspend_power_state() argument 294 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in hikey960_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/xilinx/versal_net/ |
| H A D | plat_psci_pm.c | 308 psci_power_state_t *req_state) in versal_net_validate_power_state() argument 316 assert(req_state != NULL); in versal_net_validate_power_state() 320 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_net_validate_power_state() 322 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in versal_net_validate_power_state() 339 static void versal_net_get_sys_suspend_power_state(psci_power_state_t *req_state) in versal_net_get_sys_suspend_power_state() argument 344 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in versal_net_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/plat/amd/versal2/ |
| H A D | plat_psci_pm.c | 315 psci_power_state_t *req_state) in versal2_validate_power_state() argument 322 assert(req_state); in versal2_validate_power_state() 326 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal2_validate_power_state() 328 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; in versal2_validate_power_state() 344 static void versal2_get_sys_suspend_power_state(psci_power_state_t *req_state) in versal2_get_sys_suspend_power_state() argument 349 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE; in versal2_get_sys_suspend_power_state()
|
| /rk3399_ARM-atf/include/plat/nuvoton/common/ |
| H A D | plat_npcm845x.h | 32 psci_power_state_t *req_state); 35 void npcm845x_get_sys_suspend_power_state(psci_power_state_t *req_state);
|