| #
b8ad1a16 |
| 16-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "feat(rcar): deduplicate PWRC timer" into integration
|
| #
92196d4f |
| 27-Sep-2025 |
Marek Vasut <marek.vasut+renesas@mailbox.org> |
feat(rcar): deduplicate PWRC timer
The PWRC timer code is functionally identical between Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mai
feat(rcar): deduplicate PWRC timer
The PWRC timer code is functionally identical between Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Change-Id: Id50a730ea58faedaa24380fd3171be171ecd7269
show more ...
|
| #
fcb80d7d |
| 11-Feb-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes: fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset chore(docs): drop the "wfi" from `pwr_
Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes: fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi` chore(psci): drop skip_wfi variable feat(arm): convert arm platforms to expect a wakeup fix(cpus): avoid SME related loss of context on powerdown feat(psci): allow cores to wake up from powerdown refactor: panic after calling psci_power_down_wfi() refactor(cpus): undo errata mitigations feat(cpus): add sysreg_bit_toggle
show more ...
|
| #
db5fe4f4 |
| 08-Oct-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`
To allow for generic handling of a wakeup, this hook is no longer expected to call wfi itself. Update the name everywhere to reflect this e
chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`
To allow for generic handling of a wakeup, this hook is no longer expected to call wfi itself. Update the name everywhere to reflect this expectation so that future platform implementers don't get misled.
Change-Id: Ic33f0b6da74592ad6778fd802c2f0b85223af614 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
show more ...
|
| #
33b0c792 |
| 31-Jan-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I25047322,Id476f815 into integration
* changes: fix(plat/rcar3): change stack size of BL31 fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3
|
| #
1b49ba0f |
| 01-Dec-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3
Fixed an issue where the CPU and Cluster could not be turned OFF when the SYSTEM_OFF has executed.
Signed-off-by: Hideyuki Nitta <hideyuki.ni
fix(plat/rcar3): fix SYSTEM_OFF processing for R-Car D3
Fixed an issue where the CPU and Cluster could not be turned OFF when the SYSTEM_OFF has executed.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: Id476f815b58246ae0574c04ccb3eb201d09039b9
show more ...
|
| #
5b096283 |
| 05-Jan-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I19f713de,Ib5bda93d,Id5dafc04,Id20e65e2 into integration
* changes: feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.3 feat(plat/rcar3): modify type for Internal function ar
Merge changes I19f713de,Ib5bda93d,Id5dafc04,Id20e65e2 into integration
* changes: feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.3 feat(plat/rcar3): modify type for Internal function argument feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53 fix(plat/rcar3): fix to bit operation for WUPMSKCA57/53
show more ...
|
| #
ffb725be |
| 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
feat(plat/rcar3): modify type for Internal function argument
Modify the type of the variable that stores the value for MPIDR in the internal function from uint64_t to u_register_t.
Signed-off-by: K
feat(plat/rcar3): modify type for Internal function argument
Modify the type of the variable that stores the value for MPIDR in the internal function from uint64_t to u_register_t.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ib5bda93d5432e0412132bddf41ead8ee3fcf9e46
show more ...
|
| #
d9912cf3 |
| 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53
Add new function so that the value of bit at WUPMSKCA57/53, which points to CPU other than the BOOT CPU, is 1 at initialization.
feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53
Add new function so that the value of bit at WUPMSKCA57/53, which points to CPU other than the BOOT CPU, is 1 at initialization. Modify sequence so that value of each bit for CPU at WUPMSKCA57/53 is basically 0 and target bit value is changed to 1 only when CPU_OFF.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Id5dafc04e1dbaf265c8b67b903c335bb1af49914
show more ...
|
| #
bf63dc56 |
| 18-Oct-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes I684d54a7,I61339fc5,Ic0dabf3e,Ief09a841 into integration
* changes: feat(plat/rcar): change process for Suspend To RAM fix(plat/rcar): change process that copy code to system ram
Merge changes I684d54a7,I61339fc5,Ic0dabf3e,Ief09a841 into integration
* changes: feat(plat/rcar): change process for Suspend To RAM fix(plat/rcar): change process that copy code to system ram fix(plat/rcar): fix cache maintenance process of reading cert header fix(plat/rcar): fix to load image when option BL2_DCACHE_ENABLE is enabled
show more ...
|
| #
731aa26f |
| 12-Jul-2021 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
feat(plat/rcar): change process for Suspend To RAM
- Added the function rcar_pwr_domain_pwr_down_wfi() for power down process. And change the sequence to power down. - Removed clearing the count o
feat(plat/rcar): change process for Suspend To RAM
- Added the function rcar_pwr_domain_pwr_down_wfi() for power down process. And change the sequence to power down. - Removed clearing the count of psci_locks (PSCI exclusive lock) during Warm Boot.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I684d54a798a6dccde15fbebe16c6e104cbb470ed
show more ...
|
| #
65d227c3 |
| 14-Jan-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes Ie8922309,I1001bea1,I66265e5e,I2cc0ceda,I04805d72, ... into integration
* changes: plat: renesas: common: Include ulcb_cpld.h conditionally plat: renesas: Move to common plat: re
Merge changes Ie8922309,I1001bea1,I66265e5e,I2cc0ceda,I04805d72, ... into integration
* changes: plat: renesas: common: Include ulcb_cpld.h conditionally plat: renesas: Move to common plat: renesas: aarch64: Move to common drivers: renesas: Move ddr/qos/qos header files drivers: renesas: rpc: Move to common drivers: renesas: avs: Move to common drivers: renesas: auth: Move to common drivers: renesas: dma: Move to common drivers: renesas: watchdog: Move to common drivers: renesas: rom: Move to common drivers: renesas: delay: Move to common drivers: renesas: console: Move to common drivers: renesas: pwrc: Move to common drivers: renesas: io: Move to common drivers: renesas: eMMC: Move to common
show more ...
|
| #
27bbfca9 |
| 16-Dec-2020 |
Biju Das <biju.das.jz@bp.renesas.com> |
plat: renesas: common: Include ulcb_cpld.h conditionally
Include header ulcb_cpld.h in plat_pm.c only if RCAR_GEN3_ULCB is enabled.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
plat: renesas: common: Include ulcb_cpld.h conditionally
Include header ulcb_cpld.h in plat_pm.c only if RCAR_GEN3_ULCB is enabled.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: Ie89223097c608265c50e32778e8df28feed82480
show more ...
|
| #
499c2713 |
| 16-Dec-2020 |
Biju Das <biju.das.jz@bp.renesas.com> |
plat: renesas: Move to common
Move rcar plat code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.c
plat: renesas: Move to common
Move rcar plat code to common directory, so that the same code can be re-used by both R-Car Gen3 and RZ/G2 platforms.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I1001bea1a8a9232a03ddbf6931ca3c764ba1e181
show more ...
|