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35b2bbf4 |
| 28-Jul-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/pabandon_cleanup" into integration
* changes: feat(cpus): add pabandon support to the Alto cpu feat(psci): optimise clock init on a pabandon feat(psci): check that
Merge changes from topic "bk/pabandon_cleanup" into integration
* changes: feat(cpus): add pabandon support to the Alto cpu feat(psci): optimise clock init on a pabandon feat(psci): check that CPUs handled a pabandon feat(psci): make pabandon support generic refactor(psci): unify coherency exit between AArch64 and AArch32 refactor(psci): absorb psci_power_down_wfi() into common code refactor(platforms): remove usage of psci_power_down_wfi fix(cm): disable SPE/TRBE correctly
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| #
1ed77d1b |
| 11-Mar-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(platforms): remove usage of psci_power_down_wfi
The callers in PSCI will now call wfi() after calling the pwr_domain_pwr_down() platform hook (previously they were mutually exclusive). As s
refactor(platforms): remove usage of psci_power_down_wfi
The callers in PSCI will now call wfi() after calling the pwr_domain_pwr_down() platform hook (previously they were mutually exclusive). As such, there is no need for platforms to do this themselves. In fact, it is strongly advisable for platforms not to do this themselves so that the PSCI can apply any relevant errata mitigations.
Change-Id: Ic9702edef7503996be24d984e29dfcc13bc3fcba Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
fcb80d7d |
| 11-Feb-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes: fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset chore(docs): drop the "wfi" from `pwr_
Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes: fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi` chore(psci): drop skip_wfi variable feat(arm): convert arm platforms to expect a wakeup fix(cpus): avoid SME related loss of context on powerdown feat(psci): allow cores to wake up from powerdown refactor: panic after calling psci_power_down_wfi() refactor(cpus): undo errata mitigations feat(cpus): add sysreg_bit_toggle
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| #
2bd3b397 |
| 21-Oct-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor: panic after calling psci_power_down_wfi()
This function doesn't return and its callers that don't return either rely on this. Drop the dead attribute and add a panic() after it to make thi
refactor: panic after calling psci_power_down_wfi()
This function doesn't return and its callers that don't return either rely on this. Drop the dead attribute and add a panic() after it to make this expectation explicit. Calling `wfi` in the powerdown sequence is terminal so even if the function was made to return, there would be no functional change.
This is useful for a following patch that makes psci_power_down_wfi() return.
Change-Id: I62ca1ee058b1eaeb046966c795081e01bf45a2eb Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
8eca49e4 |
| 01-Aug-2023 |
André Przywara <andre.przywara@arm.com> |
Merge "feat(allwinner): use reset through scpi for warm/soft reset" into integration
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0cf5f08a |
| 14-May-2023 |
Andrey Skvortsov <andrej.skvortzov@gmail.com> |
feat(allwinner): use reset through scpi for warm/soft reset
On systems with SCP (running crust) scpi_system_reboot action performs board-level (PMIC) reboot. This doesn't preserve RAM content on A64
feat(allwinner): use reset through scpi for warm/soft reset
On systems with SCP (running crust) scpi_system_reboot action performs board-level (PMIC) reboot. This doesn't preserve RAM content on A64 PinePhone at least.
warm/soft system reset without RAM reset is required to get pstore (persistent storage) in RAM working with Linux kernel. That is very useful for oops/panic logging for post mortem analysis.
scpi_system_reset action performs reset via SoC reset (using watchdog) and RAM content is preserved in this case. Linux kernel detects system_reset2 support and uses it for warm reset automatically.
Change-Id: I1c21aa8f27c8e0395e2326034788693b59b80bc4 Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
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3e0a087f |
| 04-May-2022 |
André Przywara <andre.przywara@arm.com> |
Merge changes from topic "allwinner-idle" into integration
* changes: feat(allwinner): provide CPU idle states to the rich OS feat(allwinner): simplify CPU_SUSPEND power state encoding feat(al
Merge changes from topic "allwinner-idle" into integration
* changes: feat(allwinner): provide CPU idle states to the rich OS feat(allwinner): simplify CPU_SUSPEND power state encoding feat(allwinner): choose PSCI states to avoid translation feat(fdt): add the ability to supply idle state information fix(allwinner): improve DTB patching error handling refactor(allwinner): patch the DTB after setting up PSCI refactor(allwinner): move DTB change code into allwinner/common
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| #
52466ec3 |
| 19-Mar-2021 |
Samuel Holland <samuel@sholland.org> |
feat(allwinner): simplify CPU_SUSPEND power state encoding
Use the encoding recommended by the PSCI specification: four bits for the power state at each power level.
SCPI provides no way to handsha
feat(allwinner): simplify CPU_SUSPEND power state encoding
Use the encoding recommended by the PSCI specification: four bits for the power state at each power level.
SCPI provides no way to handshake an exit from a standby state, so the only possible standby state is the architectural WFI state. Since WFI can be used outside of PSCI, we do not allow passing in standby states.
Change-Id: I4b3b84e5c255ee58a25255a0cab5d7623425086e Signed-off-by: Samuel Holland <samuel@sholland.org>
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| #
159c36fd |
| 19-Mar-2021 |
Samuel Holland <samuel@sholland.org> |
feat(allwinner): choose PSCI states to avoid translation
Aligning the PSCI and SCPI power states avoids some code to translate between the two. This also makes room for an intermediate power state,
feat(allwinner): choose PSCI states to avoid translation
Aligning the PSCI and SCPI power states avoids some code to translate between the two. This also makes room for an intermediate power state, for future firmware capability growth.
Change-Id: I26691085f277a96bd405e3305ab0fe390a92b418 Signed-off-by: Samuel Holland <samuel@sholland.org>
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81e63f25 |
| 26-Jul-2021 |
André Przywara <andre.przywara@arm.com> |
Merge changes from topic "allwinner_mmap" into integration
* changes: refactor(plat/allwinner): clean up platform definitions refactor(plat/allwinner): do not map BL32 DRAM at EL3 refactor(pla
Merge changes from topic "allwinner_mmap" into integration
* changes: refactor(plat/allwinner): clean up platform definitions refactor(plat/allwinner): do not map BL32 DRAM at EL3 refactor(plat/allwinner): map SRAM as device memory by default refactor(plat/allwinner): rename static mmap region constant feat(bl_common): import BL_NOBITS_{BASE,END} when defined
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ab74206b |
| 14-Dec-2020 |
Samuel Holland <samuel@sholland.org> |
refactor(plat/allwinner): map SRAM as device memory by default
The SRAM on Allwinner platforms is shared between BL31 and coprocessor firmware. Previously, SRAM was mapped as normal memory by defaul
refactor(plat/allwinner): map SRAM as device memory by default
The SRAM on Allwinner platforms is shared between BL31 and coprocessor firmware. Previously, SRAM was mapped as normal memory by default. This scheme requires carveouts and cache maintenance code for proper synchronization with the coprocessor.
A better scheme is to only map pages owned by BL31 as normal memory, and leave everything else as device memory. This removes the need for cache maintenance, and it makes the mapping for BL31 RW data explicit instead of magic.
Signed-off-by: Samuel Holland <samuel@sholland.org> Change-Id: I820ddeba2dfa2396361c2322308c0db51b55c348
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c36e2d48 |
| 22-Feb-2021 |
André Przywara <andre.przywara@arm.com> |
Merge changes from topic "sunxi-split-psci" into integration
* changes: allwinner: Split native and SCPI-based PSCI implementations allwinner: psci: Improve system shutdown/reset sequence allw
Merge changes from topic "sunxi-split-psci" into integration
* changes: allwinner: Split native and SCPI-based PSCI implementations allwinner: psci: Improve system shutdown/reset sequence allwinner: psci: Drop .pwr_domain_pwr_down_wfi callback allwinner: Separate code to power off self and other CPUs
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| #
fe753c97 |
| 16-Jan-2021 |
Samuel Holland <samuel@sholland.org> |
allwinner: Split native and SCPI-based PSCI implementations
In order to keep SCP firmware as optional, the original, limited native PSCI implementation was kept around as a fallback. This turned out
allwinner: Split native and SCPI-based PSCI implementations
In order to keep SCP firmware as optional, the original, limited native PSCI implementation was kept around as a fallback. This turned out to be a good decision, as some newer SoCs omit the ARISC, and thus cannot run SCP firmware.
However, keeping the two implementations in one file makes things unnecessarily messy. First, it is difficult to compile out the SCPI-based implementation where it is not applicable. Second the check is done in each callback, while scpi_available is only updated at boot. This makes the individual callbacks unnecessarily complicated.
It is cleaner to provide two entirely separate implementations in two separate files. The native implementation does not support any kind of CPU suspend, so its callbacks are greatly simplified. One function, sunxi_validate_ns_entrypoint, is shared between the two implementations.
Finally, the logic for choosing between implementations is kept in a third file, to provide for platforms where only one implementation is applicable and the other is compiled out.
Change-Id: I4914f07d8e693dbce218e0e2394bef15c42945f8 Signed-off-by: Samuel Holland <samuel@sholland.org>
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