| #
35b2bbf4 |
| 28-Jul-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/pabandon_cleanup" into integration
* changes: feat(cpus): add pabandon support to the Alto cpu feat(psci): optimise clock init on a pabandon feat(psci): check that
Merge changes from topic "bk/pabandon_cleanup" into integration
* changes: feat(cpus): add pabandon support to the Alto cpu feat(psci): optimise clock init on a pabandon feat(psci): check that CPUs handled a pabandon feat(psci): make pabandon support generic refactor(psci): unify coherency exit between AArch64 and AArch32 refactor(psci): absorb psci_power_down_wfi() into common code refactor(platforms): remove usage of psci_power_down_wfi fix(cm): disable SPE/TRBE correctly
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| #
1ed77d1b |
| 11-Mar-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(platforms): remove usage of psci_power_down_wfi
The callers in PSCI will now call wfi() after calling the pwr_domain_pwr_down() platform hook (previously they were mutually exclusive). As s
refactor(platforms): remove usage of psci_power_down_wfi
The callers in PSCI will now call wfi() after calling the pwr_domain_pwr_down() platform hook (previously they were mutually exclusive). As such, there is no need for platforms to do this themselves. In fact, it is strongly advisable for platforms not to do this themselves so that the PSCI can apply any relevant errata mitigations.
Change-Id: Ic9702edef7503996be24d984e29dfcc13bc3fcba Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
fcb80d7d |
| 11-Feb-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes: fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset chore(docs): drop the "wfi" from `pwr_
Merge changes I765a7fa0,Ic33f0b6d,I8d1a88c7,I381f96be,I698fa849, ... into integration
* changes: fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi` chore(psci): drop skip_wfi variable feat(arm): convert arm platforms to expect a wakeup fix(cpus): avoid SME related loss of context on powerdown feat(psci): allow cores to wake up from powerdown refactor: panic after calling psci_power_down_wfi() refactor(cpus): undo errata mitigations feat(cpus): add sysreg_bit_toggle
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| #
db5fe4f4 |
| 08-Oct-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`
To allow for generic handling of a wakeup, this hook is no longer expected to call wfi itself. Update the name everywhere to reflect this e
chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi`
To allow for generic handling of a wakeup, this hook is no longer expected to call wfi itself. Update the name everywhere to reflect this expectation so that future platform implementers don't get misled.
Change-Id: Ic33f0b6da74592ad6778fd802c2f0b85223af614 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
2bd3b397 |
| 21-Oct-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor: panic after calling psci_power_down_wfi()
This function doesn't return and its callers that don't return either rely on this. Drop the dead attribute and add a panic() after it to make thi
refactor: panic after calling psci_power_down_wfi()
This function doesn't return and its callers that don't return either rely on this. Drop the dead attribute and add a panic() after it to make this expectation explicit. Calling `wfi` in the powerdown sequence is terminal so even if the function was made to return, there would be no functional change.
This is useful for a following patch that makes psci_power_down_wfi() return.
Change-Id: I62ca1ee058b1eaeb046966c795081e01bf45a2eb Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
21fcd9f4 |
| 10-Jul-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "psci-osi" into integration
* changes: fix(sc7280): update system suspend in OS-initiated mode fix(fvp): update system suspend in OS-initiated mode
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0a9270ab |
| 28-Jun-2023 |
Wing Li <wingers@google.com> |
fix(sc7280): update system suspend in OS-initiated mode
This patch fixes system suspend in OS-initiated mode by setting the value of `last_at_pwrlvl` in the `psci_power_state_t` object to `PLAT_MAX_
fix(sc7280): update system suspend in OS-initiated mode
This patch fixes system suspend in OS-initiated mode by setting the value of `last_at_pwrlvl` in the `psci_power_state_t` object to `PLAT_MAX_PWR_LVL`, which otherwise would result in undefined behavior.
This is conditionally compiled into the build depending on the value of the `PSCI_OS_INIT_MODE` build option.
Change-Id: Ib9ff606b7eebd8a8224891a0d239a4e13311fe2a Signed-off-by: Wing Li <wingers@google.com>
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f4d011b0 |
| 12-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "psci-osi" into integration
* changes: fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t fix(sc7280): update pwr_domain_suspend fix(fvp): update p
Merge changes from topic "psci-osi" into integration
* changes: fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t fix(sc7280): update pwr_domain_suspend fix(fvp): update pwr_domain_suspend
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| #
a43be0f6 |
| 04-May-2023 |
Wing Li <wingers@google.com> |
fix(sc7280): update pwr_domain_suspend
Change-Id: I0ee6598e9a9a01aea49e05307c68bde9993debba Signed-off-by: Wing Li <wingers@google.com>
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| #
92e93253 |
| 28-Mar-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "psci-osi" into integration
* changes: feat(sc7280): add support for PSCI_OS_INIT_MODE feat(fvp): enable support for PSCI OS-initiated mode feat(psci): update PSCI_FEA
Merge changes from topic "psci-osi" into integration
* changes: feat(sc7280): add support for PSCI_OS_INIT_MODE feat(fvp): enable support for PSCI OS-initiated mode feat(psci): update PSCI_FEATURES feat(psci): add support for OS-initiated mode feat(psci): add support for PSCI_SET_SUSPEND_MODE build(psci): add build option for OS-initiated mode docs(psci): add design proposal for OS-initiated mode
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e528bbec |
| 14-Feb-2023 |
Maulik Shah <quic_mkshah@quicinc.com> |
feat(sc7280): add support for PSCI_OS_INIT_MODE
Enable PSCI_OS_INIT_MODE support for sc7280.
Change-Id: If94d59190c0bd876e748cd80b2641ce7616fd817 Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
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344e5e81 |
| 19-Jan-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "feat_state_rework" into integration
* changes: feat(fvp): enable FEAT_HCX by default refactor(context-mgmt): move FEAT_HCX save/restore into C refactor(cpufeat): conv
Merge changes from topic "feat_state_rework" into integration
* changes: feat(fvp): enable FEAT_HCX by default refactor(context-mgmt): move FEAT_HCX save/restore into C refactor(cpufeat): convert FEAT_HCX to new scheme feat(fvp): enable FEAT_FGT by default refactor(context-mgmt): move FEAT_FGT save/restore code into C refactor(amu): convert FEAT_AMUv1 to new scheme refactor(cpufeat): decouple FGT feature detection and build flags refactor(cpufeat): check FEAT_FGT in a new way refactor(cpufeat): move helpers into .c file, rename FEAT_STATE_ feat(aarch64): make ID system register reads non-volatile
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c2fb8ef6 |
| 14-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
feat(aarch64): make ID system register reads non-volatile
Our system register access function wrappers are using "volatile" inline assembly instructions. On the first glance this is a good idea, sin
feat(aarch64): make ID system register reads non-volatile
Our system register access function wrappers are using "volatile" inline assembly instructions. On the first glance this is a good idea, since many system registers have side effects, and we don't want the compiler to optimise or reorder them (what "volatile" prevents).
However this also naturally limits the compiler's freedom to optimise code better, and those volatile properties don't apply to every type of system register. One example are the CPU ID registers, which have constant values, are side-effect free and read-only.
Introduce a new wrapper type that drops the volatile keyword, and use that for the wrappers instantiating ID register accessors.
This allows the compiler to freely optimise those instructions away, if their result isn't actually used, which can trigger further optimisations.
Change-Id: I3c64716ae4f4bf603f0ea57b652bd50bcc67bb0e Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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a4c979ad |
| 26-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration
* changes: qti/sc7180: Do shutdown handling outside qtiseclib qti: Add SPMI PMIC arbitrator driver qti/sc7180: Fix GIC-600 support
Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration
* changes: qti/sc7180: Do shutdown handling outside qtiseclib qti: Add SPMI PMIC arbitrator driver qti/sc7180: Fix GIC-600 support setting
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| #
522a2277 |
| 21-Feb-2019 |
Julius Werner <jwerner@chromium.org> |
qti/sc7180: Do shutdown handling outside qtiseclib
With an open source SPMI driver we can now remove qtiseclib involvement in reset and shutdown handling by setting the required registers directly.
qti/sc7180: Do shutdown handling outside qtiseclib
With an open source SPMI driver we can now remove qtiseclib involvement in reset and shutdown handling by setting the required registers directly.
Change-Id: I6bf1db15734048df583daa2a4ee98701c6ece621 Signed-off-by: Julius Werner <jwerner@chromium.org>
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37a12f04 |
| 10-Aug-2020 |
Julius Werner <jwerner@chromium.org> |
Merge "sc7180 platform support" into integration
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5bd9c17d |
| 22-Apr-2020 |
Saurabh Gorecha <sgorecha@codeaurora.org> |
sc7180 platform support
Adding support for QTI CHIP SC7180 on ATF
Change-Id: I0d82d3a378036003fbd0bc4784f61464bb76ea82 Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org> Co-authored-by: Mauli
sc7180 platform support
Adding support for QTI CHIP SC7180 on ATF
Change-Id: I0d82d3a378036003fbd0bc4784f61464bb76ea82 Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org> Co-authored-by: Maulik Shah <mkshah@codeaurora.org>
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