| /rk3399_ARM-atf/plat/renesas/common/ |
| H A D | rcar_common.c | 55 unsigned int fixed = 0; in plat_ea_handler() local 57 fixed |= rcar_pcie_fixup(0); in plat_ea_handler() 58 fixed |= rcar_pcie_fixup(1); in plat_ea_handler() 60 if (fixed) in plat_ea_handler()
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 208 CPU. This needs to be enabled only for revision r0p0 of the CPU, and is fixed 213 is fixed in r1p1. 269 revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to 287 fixed in r1p1. 291 fixed in r1p1. 295 fixed in r1p1. 340 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0. 398 fixed in r0p1. 402 fixed in r0p1. 497 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in [all …]
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| /rk3399_ARM-atf/docs/security_advisories/ |
| H A D | security-advisory-tfv-13.rst | 47 | cortex-x4 | r0p0, r0p1, r0p2 | fixed in r0p3 | 49 | cortex-x925 | r0p0, r0p1 | fixed in r0p2 | 53 | neoverse-v3 | r0p0, r0p1 | fixed in r0p2 | 55 | neoverse-v3ae | r0p0, r0p1 | fixed in r0p2 | 57 | c1-premium | r0p0 | fixed in r1p0 | 59 | c1-pro | r0p0, r1p0 | fixed in r1p1 | 61 | c1-ultra | r0p0 | fixed in r1p0 |
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| H A D | security-advisory-tfv-5.rst | 50 NOTE: The original pull request referenced above only fixed the issue for S-EL1 51 whereas the EL3 was fixed in the later commits.
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| /rk3399_ARM-atf/fdts/ |
| H A D | a5ds.dts | 68 compatible = "fixed-clock"; 75 compatible = "fixed-clock"; 82 compatible = "fixed-clock"; 139 v2m_fixed_3v3: fixed-regulator-0 { 140 compatible = "regulator-fixed";
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| H A D | morello.dtsi | 85 compatible = "fixed-clock"; 92 compatible = "fixed-clock"; 99 compatible = "fixed-clock";
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| H A D | fvp-foundation-motherboard.dtsi | |
| H A D | corstone700.dtsi | 51 compatible = "fixed-clock"; 59 compatible = "fixed-clock"; 67 compatible = "fixed-clock";
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| H A D | n1sdp-single-chip.dts | 34 compatible = "fixed-clock"; 41 compatible = "fixed-clock";
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| H A D | tc-base.dtsi | 46 /* Use fixed clocks */ 341 compatible = "fixed-clock"; 348 compatible = "fixed-clock"; 355 compatible = "fixed-clock"; 373 compatible = "fixed-clock"; 380 compatible = "fixed-clock"; 428 compatible = "fixed-clock"; 442 compatible = "regulator-fixed"; 463 compatible = "fixed-clock"; 469 compatible = "fixed-clock";
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| H A D | rtsm_ve-motherboard.dtsi | 14 compatible = "fixed-clock"; 21 compatible = "fixed-clock"; 28 compatible = "fixed-clock"; 35 compatible = "regulator-fixed";
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| H A D | stm32mp15xx-dhcor-io1v8.dtsi | 11 compatible = "regulator-fixed";
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| H A D | arm_fpga.dts | 68 compatible = "fixed-clock"; 75 compatible = "fixed-clock";
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| H A D | stm32mp251.dtsi | 30 compatible = "fixed-clock"; 36 compatible = "fixed-clock"; 42 compatible = "fixed-clock"; 48 compatible = "fixed-clock"; 54 compatible = "fixed-clock";
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| H A D | rdaspen.dts | 56 compatible = "fixed-clock"; 108 /* UART is fixed as 24MHz, both UARTCLK and PCLK */
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| H A D | stm32mp131.dtsi | 32 compatible = "fixed-clock"; 38 compatible = "fixed-clock"; 44 compatible = "fixed-clock"; 50 compatible = "fixed-clock"; 56 compatible = "fixed-clock";
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| H A D | n1sdp.dtsi | 71 compatible = "fixed-clock"; 78 compatible = "fixed-clock";
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| H A D | stm32mp157c-lxa-mc1.dts | 40 compatible = "regulator-fixed";
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| H A D | fvp-ve-Cortex-A7x1.dts | 64 compatible = "fixed-clock";
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| H A D | stm32mp151.dtsi | 43 compatible = "fixed-clock"; 49 compatible = "fixed-clock"; 55 compatible = "fixed-clock"; 61 compatible = "fixed-clock"; 67 compatible = "fixed-clock";
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| H A D | stm32mp135f-dk.dts | 36 compatible = "regulator-fixed"; 44 compatible = "regulator-fixed";
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| H A D | morello-soc.dts | 279 compatible = "fixed-clock"; 302 compatible = "fixed-clock"; 453 compatible = "fixed-clock";
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| H A D | stm32mp153c-lxa-fairytux2.dts | 40 compatible = "regulator-fixed";
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| H A D | stm32mp157c-lxa-tac.dts | 40 compatible = "regulator-fixed";
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| /rk3399_ARM-atf/docs/plat/ |
| H A D | rpi5.rst | 31 - ``PRELOADED_BL33_BASE``: Used to specify the fixed address of a BL33 binary 35 - ``RPI3_PRELOADED_DTB_BASE``: This option allows to specify the fixed address of
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