Searched refs:IMX_CSU_BASE (Results 1 – 11 of 11) sorted by relevance
29 #define CSLx_REG(x) (IMX_CSU_BASE + ((x) / 2) * 4)33 #define CSU_HP_REG(x) (IMX_CSU_BASE + (((x) / 16) * 4) + 0x200)37 #define CSU_SA_REG(x) (IMX_CSU_BASE + (((x) / 16) * 4) + 0x218)41 #define CSU_HPCONTROL_REG(x) (IMX_CSU_BASE + (((x) / 16) * 4) + 0x358)
51 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl2_el3_early_platform_setup()
148 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl31_early_platform_setup2()
74 mmio_write_32(IMX_CSU_BASE + i * 4, CSU_CSL_OPEN_ACCESS); in bl2_el3_early_platform_setup()
144 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl31_early_platform_setup2()
89 #define IMX_CSU_BASE U(0x303e0000) macro
109 #define IMX_CSU_BASE U(0x303e0000) macro
92 #define IMX_CSU_BASE U(0x303e0000) macro
116 mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); in bl31_early_platform_setup2()
111 #define IMX_CSU_BASE U(0x303e0000) macro
156 mmio_write_32(IMX_CSU_BASE + i * 4, 0xffffffff); in bl31_early_platform_setup2()