Merge changes from topic "imx8mq_build_fix" into integration

* changes:
fix(imx8m): fix imx8mq build break
fix(imx8mq): fix imx8mq build break due to hab

fix(imx8m): fix imx8mq build break

Fix the build break for i.MX8MQ to make it boot
with basic function enabled.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2ff7976e3fb7960d6876d26fe0b4a

fix(imx8m): fix imx8mq build break

Fix the build break for i.MX8MQ to make it boot
with basic function enabled.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2ff7976e3fb7960d6876d26fe0b4a78e51219ae2

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fix(imx8mq): fix imx8mq build break due to hab

Add the HAB secure boot support for the i.MX8MQ to
fix the build break.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I806de2dc42806e008355cc

fix(imx8mq): fix imx8mq build break due to hab

Add the HAB secure boot support for the i.MX8MQ to
fix the build break.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I806de2dc42806e008355cc185065e774570362f0

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Merge changes from topic "fix-imx8m-uart-domain-permission" into integration

* changes:
fix(imx8m): ensure domain permissions for the console
refactor(imx8m): replace UART base magic numbers wit

Merge changes from topic "fix-imx8m-uart-domain-permission" into integration

* changes:
fix(imx8m): ensure domain permissions for the console
refactor(imx8m): replace UART base magic numbers with macros

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refactor(imx8m): replace UART base magic numbers with macros

This patch replaces the magic numbers of the UART base addresses with
the corresponding macros defined in the appropriate platform file.

refactor(imx8m): replace UART base magic numbers with macros

This patch replaces the magic numbers of the UART base addresses with
the corresponding macros defined in the appropriate platform file.

Change-Id: Ie6a4555a659e9f722a8d819958ad9a2dee7c3aa0
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>

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Merge "feat(imx8m): make bl33 start configurable via PRELOADED_BL33_BASE" into integration

feat(imx8m): make bl33 start configurable via PRELOADED_BL33_BASE

The TF-A does have a official PRELOADED_BL33_BASE define which is used
to tell the TF-A where to jump and that no bl33 loading is re

feat(imx8m): make bl33 start configurable via PRELOADED_BL33_BASE

The TF-A does have a official PRELOADED_BL33_BASE define which is used
to tell the TF-A where to jump and that no bl33 loading is requied. Use
this to make the platform specific PLAT_NS_IMAGE_OFFSET configurable.

This becomes necessary if one would like to place the bl33 code to other
places.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Change-Id: I9d462c0e9df8e6d2ad78ee770bfa59e680739a51

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Merge changes from topic "imx8m_misc_changes" into integration

* changes:
feat(imx8mq): enable dram dvfs support on imx8mq
feat(imx8m): use non-fast wakeup stop mode for system suspend
feat(im

Merge changes from topic "imx8m_misc_changes" into integration

* changes:
feat(imx8mq): enable dram dvfs support on imx8mq
feat(imx8m): use non-fast wakeup stop mode for system suspend
feat(imx8mq): correct the slot ack setting for STOP mode
feat(imx8mq): add anamix pll override setting for DSM mode
feat(imx8mq): add workaround code for ERR11171 on imx8mq
feat(imx8mq): add the dram retention support for imx8mq
feat(imx8mq): add version for B2
fix(imx8m): backup mr12/14 value from lpddr4 chip
fix(imx8m): add ddr4 dvfs sw workaround for ERR050712
fix(imx8m): fix coverity out of bound access issue
fix(imx8m): fix the dram retention random hang on some imx8mq Rev2.0
feat(imx8m): add more dram pll setting
fix(imx8m): fix the current fsp init
fix(imx8m): fix the rank to rank space issue
fix(imx8m): fix the dfiphymaster setting after dvfs
feat(imx8m): update the ddr4 dvfs flow to include ddr3l support
fix(imx8m): correct the rank info get fro mstr
feat(imx8m): fix the ddr4 dvfs random hang on imx8m

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feat(imx8mq): add the dram retention support for imx8mq

Add the dram retention support for i.MX8MQ. As there is
no enough ocram space available before entering TF-A,
so the timing info need to be co

feat(imx8mq): add the dram retention support for imx8mq

Add the dram retention support for i.MX8MQ. As there is
no enough ocram space available before entering TF-A,
so the timing info need to be copied from dram into ocram.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Id8264c342fd62e297b1969cba5ed505450c78a25

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Merge changes Ie6a13e4a,I517074b8,Ifd29b748,I1279d9cb,I3b78e0c5, ... into integration

* changes:
feat(imx8mq): add BL31 PIE support
refactor(imx8mq): introduce BL31_SIZE
refactor(imx8mq): make

Merge changes Ie6a13e4a,I517074b8,Ifd29b748,I1279d9cb,I3b78e0c5, ... into integration

* changes:
feat(imx8mq): add BL31 PIE support
refactor(imx8mq): introduce BL31_SIZE
refactor(imx8mq): make use of setup_page_tables()
feat(imx8mq): always set up console
feat(imx8mq): remove empty bl31_plat_runtime_setup
feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter

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refactor(imx8mq): introduce BL31_SIZE

No functional change.

Introduce BL31_SIZE define and calculate the limits based on the
BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make
it e

refactor(imx8mq): introduce BL31_SIZE

No functional change.

Introduce BL31_SIZE define and calculate the limits based on the
BL31_BASE and the BL31_SIZE define. Also make use of SZ_64K to make
it easier to read. This is required for later BL31 PIE support since
it drops the calculation based on the BL31_LIMIT and BL31_BASE.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I517074b866b5bf11841b51777f87c926b304488d

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feat(imx8mq): always set up console

This aligns the i.MX8MQ platform behaviour with the other i.MX8M*
platforms by always setting up the console UART.

Signed-off-by: Lucas Stach <l.stach@pengutroni

feat(imx8mq): always set up console

This aligns the i.MX8MQ platform behaviour with the other i.MX8M*
platforms by always setting up the console UART.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: I1279d9cb4feb6e789422b9844cab711b8daae74e

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feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter

This aligns the i.MX8MQ build with the other i.MX8M platforms by
allowing to override the default IMX_BOOT_UART_BASE value via

feat(imx8mq): make IMX_BOOT_UART_BASE configurable via build parameter

This aligns the i.MX8MQ build with the other i.MX8M platforms by
allowing to override the default IMX_BOOT_UART_BASE value via a make
parameter.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Iad9b844517209fc7d051c61767f71ac9fa2b55c7

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Merge "fix(imx8mq): correct architected counter frequency" into integration

fix(imx8mq): correct architected counter frequency

Different from other i.MX SoCs, which typically use a 24MHz reference clock,
the i.MX8MQ uses a 25MHz reference clock. As the architected timer clo

fix(imx8mq): correct architected counter frequency

Different from other i.MX SoCs, which typically use a 24MHz reference clock,
the i.MX8MQ uses a 25MHz reference clock. As the architected timer clock
frequency is directly sourced from the reference clock via a /3 divider this
SoC runs the timers at 8.33MHz.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Change-Id: Ief36af9ffebce7cb75a200124134828d3963e744

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Merge changes Idfd268cd,I362445b9,Ibea052d3,I28cb8f74,I501ae76a, ... into integration

* changes:
feat(imx8mp): enable BL32 fdt overlay support on imx8mp
feat(imx8mq): enable optee fdt overlay su

Merge changes Idfd268cd,I362445b9,Ibea052d3,I28cb8f74,I501ae76a, ... into integration

* changes:
feat(imx8mp): enable BL32 fdt overlay support on imx8mp
feat(imx8mq): enable optee fdt overlay support
feat(imx8mn): enable optee fdt overlay support
feat(imx8mm): enable optee fdt overlay support
feat(imx8mp): add trusty for imx8mp
feat(imx8mq): enable trusty for imx8mq
feat(imx8mn): enable Trusty OS for imx8mn
feat(imx8mm): enable Trusty OS on imx8mm
feat(imx8/imx8m): switch to xlat_tables_v2
feat(imx8m): enable the coram_s tz by default on imx8mn/mp
feat(imx8m): enable the csu init on imx8m
feat(imx8m): add a simple csu driver for imx8m family
refactor(imx8m): replace magic number with enum type
feat(imx8m): add imx csu/rdc enum type defines for imx8m
fix(imx8m): check the validation of domain id
feat(imx8m): enable conditional build for SDEI

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feat(imx8mq): enable optee fdt overlay support

Enable optee fdt overlay support

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I362

feat(imx8mq): enable optee fdt overlay support

Enable optee fdt overlay support

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I362445b93dc293a27c99b0d20a73f6b06ad0cd39

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feat(imx8mq): enable trusty for imx8mq

Add trusty support for imx8mq, default load address
and size for trusty os will be 0xfe000000 and 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off

feat(imx8mq): enable trusty for imx8mq

Add trusty support for imx8mq, default load address
and size for trusty os will be 0xfe000000 and 0x2000000.

Signed-off-by: Ji Luo <ji.luo@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I2b35ee525b25b80bf6c9599a0adcc2d9f069aa41

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Merge "feat(plat/imx8m): add SiP call for secondary boot" into integration

feat(plat/imx8m): add SiP call for secondary boot

In iMX8MM it is possible to have two copies of bootloader in
SD/eMMC and switch between them. The switch is triggered either
by the BootROM in case

feat(plat/imx8m): add SiP call for secondary boot

In iMX8MM it is possible to have two copies of bootloader in
SD/eMMC and switch between them. The switch is triggered either
by the BootROM in case the bootloader image is faulty OR can be
enforced by the user. To trigger that switch the
PERSIST_SECONDARY_BOOT bit should be set in GPR10 SRC register.
As the bit is retained after WARM reset, that permits to control
BootROM behavior regarding what boot image it will boot after
reset: primary or secondary.

This is useful for reliable bootloader A/B updates, as it permits
switching between two copies of bootloader at different offsets of
the same storage.

If the PERSIST_SECONDARY_BOOT is 0, the boot ROM uses address
0x8400 for the primary image. If the PERSIST_SECONDARY_BOOT is 1,
the boot ROM reads that secondary image table from address 0x8200
on the boot media and uses the address specified in the table for
the secondary image.

Secondary Image Table contains the sector of secondary bootloader
image, exluding the offset to that image (explained below in the
note). To generate the Secondary Image Table, use e.g.:
$ printf '\x0\x0\x0\x0\x0\x0\x0\x0\x33\x22\x11'
'\x00\x00\x10\x0\x0\x00\x0\x0\x0'
> /tmp/sit.bin
$ hexdump -vC /tmp/sit.bin
00000000 00 00 00 00
00000004 00 00 00 00
00000008 33 22 11 00 <--- This is the "tag"
0000000c 00 10 00 00 <--- This is the "firstSectorNumber"
00000010 00 00 00 00

You can also use NXP script from [1][2] imx-mkimage tool for
SIT generation. Note that the firstSectorNumber is NOT the offset
of the IVT, but an offset of the IVT decremented by Image Vector
Table offset (Table 6-25. Image Vector Table Offset and Initial
Load Region Size for iMX8MM/MQ), so for secondary SPL copy at
offset 0x1042 sectors, firstSectorNumber must be 0x1000
(0x42 sectors * 512 = 0x8400 bytes offset).

In order to test redundant boot board should be closed and
SD/MMC manufacture mode disabled, as secondary boot is not
supported in the SD/MMC manufacture mode, which can be disabled
by blowing DISABLE_SDMMC_MFG (example for iMX8MM):
> fuse prog -y 2 1 0x00800000

For additional details check i.MX 8M Mini Apllication Processor
Reference Manual, 6.1.5.4.5 Redundant boot support for
expansion device chapter.

[1] https://source.codeaurora.org/external/imx/imx-mkimage/
[2] scripts/gen_sit.sh
Change-Id: I0a5cea7295a4197f6c89183d74b4011cada52d4c
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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Merge "imx: Unify Platform specific defines for PSCI module" into integration

imx: Unify Platform specific defines for PSCI module

PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLU

imx: Unify Platform specific defines for PSCI module

PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I8b19e833a4e1067e1cfcc9bfaede7854e0e63004

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Merge changes Ib1ed9786,I6c4855c8 into integration

* changes:
plat: imx: Correct the SGIs that used for secure interrupt
plat: imx8mm: Add the support for opteed spd on imx8mq/imx8mm

plat: imx8mm: Add the support for opteed spd on imx8mq/imx8mm

Add the basic support for opteed SPD on imx8mq & imx8mm.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6c4855c89dea78d13d172c

plat: imx8mm: Add the support for opteed spd on imx8mq/imx8mm

Add the basic support for opteed SPD on imx8mq & imx8mm.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6c4855c89dea78d13d172c3d86cf047f829e51ce

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Merge "plat: imx8m: Add caam module init on imx8m" into integration