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Searched refs:GICC_AHPPIR (Results 1 – 17 of 17) sorted by relevance

/rk3399_ARM-atf/plat/amlogic/common/include/
H A Dplat_macros.S40 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/nvidia/tegra/include/
H A Dplat_macros.S38 ldr w9, [x16, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/renesas/common/include/
H A Dplat_macros_gic.S38 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dplat_macros.S43 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/hisilicon/hikey/include/
H A Dplat_macros.S43 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/mediatek/mt8183/include/
H A Dplat_macros.S41 ldr w9, [x27, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/mediatek/mt8173/include/
H A Dplat_macros.S41 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/xilinx/versal_net/include/
H A Dplat_macros.S70 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/amd/versal2/include/
H A Dplat_macros.S70 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/qti/common/inc/aarch64/
H A Dplat_macros.S77 ldr w9, [x27, #GICC_AHPPIR]
/rk3399_ARM-atf/include/plat/arm/common/aarch64/
H A Darm_macros.S74 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/xilinx/versal/include/
H A Dplat_macros.S69 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/include/plat/marvell/armada/common/aarch64/
H A Dmarvell_macros.S77 ldr w9, [x17, #GICC_AHPPIR]
/rk3399_ARM-atf/plat/rockchip/common/include/
H A Dplat_macros.S76 ldr w9, [x27, #GICC_AHPPIR]
/rk3399_ARM-atf/drivers/arm/gic/v2/
H A Dgicv2_private.h92 return mmio_read_32(base + GICC_AHPPIR); in gicc_read_ahppir()
/rk3399_ARM-atf/include/drivers/arm/
H A Dgicv2.h76 #define GICC_AHPPIR U(0x28) macro
/rk3399_ARM-atf/docs/
H A Dporting-guide.rst3547 (``GICC_AHPPIR``) is read to determine the id of the non-secure interrupt.