| /rk3399_ARM-atf/drivers/renesas/common/timer/ |
| H A D | timer.c | 27 mmio_read_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF)); in rcar_pwrc_save_timer_state()
42 mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF), in rcar_pwrc_restore_timer_state()
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| /rk3399_ARM-atf/plat/st/stm32mp2/services/ |
| H A D | stgen_svc.c | 25 unsigned long freq_to_set = mmio_read_32(STGEN_BASE + CNTFID_OFF); in stgen_svc_handler()
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| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | stm32mp_clkfunc.c | 359 cntfid0 = mmio_read_32(STGEN_BASE + CNTFID_OFF); in stm32mp_stgen_config()
371 mmio_write_32(STGEN_BASE + CNTFID_OFF, rate); in stm32mp_stgen_config()
387 rate = mmio_read_32(STGEN_BASE + CNTFID_OFF); in stm32mp_stgen_restore_rate()
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| /rk3399_ARM-atf/plat/renesas/rcar_gen4/ |
| H A D | bl31_plat_setup.c | 74 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF, reg_cntfid); in bl31_platform_setup()
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| /rk3399_ARM-atf/plat/renesas/rcar_gen4/aarch64/ |
| H A D | platform_common.c | 91 freq = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/renesas/rcar_gen5/aarch64/ |
| H A D | platform_common.c | 103 freq = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_bl31_setup.c | 174 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/renesas/rcar_gen5/ |
| H A D | bl31_plat_setup.c | 162 mmio_write_32(ARM_SYS_CNTCTL_BASE + (uintptr_t)CNTFID_OFF, reg_cntfid); in bl31_platform_setup()
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_common.c | 169 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_bl31_setup.c | 32 counter_base_frequency = mmio_read_32(SQ_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/nxp/soc-ls1046a/ |
| H A D | soc.c | 121 mmio_write_32(NXP_TIMER_ADDR + CNTFID_OFF, counter_base_frequency); in set_base_freq_CNTFID0()
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| /rk3399_ARM-atf/plat/nxp/soc-ls1088a/ |
| H A D | soc.c | 405 counter_base_frequency = mmio_read_32(NXP_TIMER_ADDR + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/nxp/soc-ls1043a/ |
| H A D | soc.c | 127 mmio_write_32(NXP_TIMER_ADDR + CNTFID_OFF, counter_base_frequency); in set_base_freq_CNTFID0()
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| /rk3399_ARM-atf/plat/renesas/common/aarch64/ |
| H A D | platform_common.c | 213 freq = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/nxp/soc-ls1028a/ |
| H A D | soc.c | 82 counter_base_frequency = mmio_read_32(NXP_TIMER_ADDR + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/nxp/soc-lx2160a/ |
| H A D | soc.c | 131 counter_base_frequency = mmio_read_32(NXP_TIMER_ADDR + CNTFID_OFF); in plat_get_syscnt_freq2()
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| /rk3399_ARM-atf/plat/renesas/rzg/ |
| H A D | bl2_plat_setup.c | 1016 mmio_write_32(ARM_SYS_CNTCTL_BASE + (uintptr_t)CNTFID_OFF, reg_cntfid); in bl2_init_generic_timer()
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| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | arch.h | 90 #define CNTFID_OFF U(0x020) macro
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| /rk3399_ARM-atf/plat/renesas/rcar/ |
| H A D | bl2_plat_setup.c | 1414 mmio_write_32(ARM_SYS_CNTCTL_BASE + (uintptr_t)CNTFID_OFF, reg_cntfid); in bl2_init_generic_timer()
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| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch.h | 164 #define CNTFID_OFF U(0x020) macro
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