1 /*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 * Copyright (c) 2025, Renesas Electronics Corporation. All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8 #include <arch.h>
9 #include <arch_helpers.h>
10 #include <common/bl_common.h>
11 #include <lib/mmio.h>
12 #include <lib/xlat_tables/xlat_tables_v2.h>
13 #include <plat/common/platform.h>
14
15 #include <plat_helpers.h>
16 #include <platform_def.h>
17 #include "rcar_def.h"
18 #include "rcar_private.h"
19 #include "rcar_version.h"
20
21 const uint8_t version_of_renesas[VERSION_OF_RENESAS_MAXLEN]
22 __section(".ro") = VERSION_OF_RENESAS;
23
24 #define RCAR_DCACHE MT_MEMORY
25
26 #define MAP_SHARED_RAM_2 \
27 MAP_REGION_FLAT(PARAMS_BASE, PARAMS_SIZE, \
28 MT_MEMORY | MT_RW | MT_SECURE)
29
30 #define MAP_SHARED_RAM \
31 MAP_REGION_FLAT(RCAR_SHARED_MEM_BASE, RCAR_SHARED_MEM_SIZE, \
32 MT_MEMORY | MT_RW | MT_SECURE)
33
34 #define MAP_DEVICE_RCAR1 \
35 MAP_REGION_FLAT(DEVICE_RCAR_BASE1, DEVICE_RCAR_SIZE1, \
36 MT_DEVICE | MT_RW | MT_SECURE)
37
38 #define MAP_DEVICE_RCAR2 \
39 MAP_REGION_FLAT(DEVICE_RCAR_BASE2, DEVICE_RCAR_SIZE2, \
40 MT_DEVICE | MT_RW | MT_SECURE)
41
42 #define MAP_DEVICE_RCAR3 \
43 MAP_REGION_FLAT(DEVICE_RCAR_BASE3, DEVICE_RCAR_SIZE3, \
44 MT_DEVICE | MT_RW | MT_SECURE)
45
46 #define MAP_ATFW_CRASH \
47 MAP_REGION_FLAT(RCAR_BL31_CRASH_BASE, RCAR_BL31_CRASH_SIZE, \
48 MT_MEMORY | MT_RW | MT_SECURE)
49
50 #define MAP_SRAM \
51 MAP_REGION_FLAT(DEVICE_SRAM_BASE, DEVICE_SRAM_SIZE, \
52 MT_MEMORY | MT_RO | MT_SECURE)
53
54 #define MAP_SRAM_DATA_STACK \
55 MAP_REGION_FLAT(DEVICE_SRAM_DATA_BASE, \
56 DEVICE_SRAM_DATA_SIZE + DEVICE_SRAM_STACK_SIZE, \
57 MT_MEMORY | MT_RW | MT_SECURE)
58
59 #define MAP_SCMI_CHANNEL \
60 MAP_REGION_FLAT(RCAR_SCMI_CHANNEL_MMU_BASE, \
61 RCAR_SCMI_CHANNEL_SIZE, \
62 MT_DEVICE | MT_RW | MT_SECURE)
63
64 static const mmap_region_t rcar_mmap[] = {
65 MAP_DEVICE_RCAR1,
66 MAP_SHARED_RAM,
67 MAP_SHARED_RAM_2,
68 MAP_ATFW_CRASH,
69 MAP_DEVICE_RCAR2,
70 MAP_SRAM,
71 MAP_SRAM_DATA_STACK,
72 MAP_SCMI_CHANNEL,
73 MAP_DEVICE_RCAR3,
74 {0}
75 };
76
77 CASSERT((ARRAY_SIZE(rcar_mmap) + RCAR_BL_REGIONS)
78 <= MAX_MMAP_REGIONS, assert_max_mmap_regions);
79
80 /*
81 * Macro generating the code for the function setting up the pagetables as per
82 * the platform memory map & initialize the mmu, for the given exception level
83 */
rcar_configure_mmu_el3(uintptr_t total_base,size_t total_size,uintptr_t ro_start,uintptr_t ro_limit)84 void rcar_configure_mmu_el3(uintptr_t total_base,
85 size_t total_size,
86 uintptr_t ro_start,
87 uintptr_t ro_limit)
88 {
89 mmap_add_region(total_base, total_base, total_size,
90 RCAR_DCACHE | MT_RW | MT_SECURE);
91 mmap_add_region(ro_start, ro_start, ro_limit - ro_start,
92 RCAR_DCACHE | MT_RO | MT_SECURE);
93 mmap_add(rcar_mmap);
94
95 init_xlat_tables();
96 enable_mmu_el3(0);
97 }
98
plat_get_syscnt_freq2(void)99 unsigned int plat_get_syscnt_freq2(void)
100 {
101 unsigned int freq;
102
103 freq = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF);
104 if (freq == 0U) {
105 panic();
106 }
107
108 return freq;
109 }
110
plat_arm_calc_core_pos(u_register_t mpidr)111 unsigned int plat_arm_calc_core_pos(u_register_t mpidr)
112 {
113 return plat_renesas_calc_core_pos(mpidr);
114 }
115