| #
139a5d05 |
| 18-Apr-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes: chore: fix preprocessor checks refactor: convert arm platforms to use the generic GIC driver refacto
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes: chore: fix preprocessor checks refactor: convert arm platforms to use the generic GIC driver refactor(gic): promote most of the GIC driver to common code refactor: make arm_gicv2.c and arm_gicv3.c common refactor(fvp): use more arm generic code for gicv3
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| #
c5c54e20 |
| 07-Jan-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor: convert arm platforms to use the generic GIC driver
This reduces the code the platforms have to carry and makes their build rules a bit simpler.
The main benefit is that plat_my_core_pos(
refactor: convert arm platforms to use the generic GIC driver
This reduces the code the platforms have to carry and makes their build rules a bit simpler.
The main benefit is that plat_my_core_pos() no longer needs to be called within the driver, helping with performance a bit.
Change-Id: I0b0d1d36d20d67c41c8c9dc14ade11bda6d4a6af Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
cb331826 |
| 12-Dec-2024 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(fvp): use more arm generic code for gicv3
The arm generic implementation for the GIC is quite comprehensive and the fvp's requirements don't diverge too much. Despite that, they completely
refactor(fvp): use more arm generic code for gicv3
The arm generic implementation for the GIC is quite comprehensive and the fvp's requirements don't diverge too much. Despite that, they completely override a lot of code that is effectively reused. Use the generic implementation instead to make it easier to follow and override as little code as possible.
Change-Id: I3474aa970d7fbb91d75c0be6a255bc0da734f860 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
c997a8de |
| 31-Mar-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: refactor(arm): simplify early platform setup function in BL31 refactor(arm): simplify early platform setup function in BL2
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: refactor(arm): simplify early platform setup function in BL31 refactor(arm): simplify early platform setup function in BL2 feat(arm): add support for Transfer List creation
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| #
b6e6e2e6 |
| 20-Mar-2025 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
refactor(arm): simplify early platform setup function in BL31
Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t values, enabling support for firmware handoff boot arguments in
refactor(arm): simplify early platform setup function in BL31
Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t values, enabling support for firmware handoff boot arguments in common code. This simplifies the interface for early platform setup.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Iff20300d2372e1a9825827ddccbd1b3bc6751e40
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| #
f9d40b5c |
| 26-Apr-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "hm/handoff" into integration
* changes: feat(handoff): add support for RESET_TO_BL2 feat(arm): support FW handoff b/w BL1 & BL2 feat(handoff): add TL source files to
Merge changes from topic "hm/handoff" into integration
* changes: feat(handoff): add support for RESET_TO_BL2 feat(arm): support FW handoff b/w BL1 & BL2 feat(handoff): add TL source files to BL1 feat(handoff): add TE's for BL1 handoff interface refactor(bl1): clean up bl2 layout calculation feat(arm): support FW handoff b/w BL2 & BL31
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| #
a5566f65 |
| 01-Dec-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(arm): support FW handoff b/w BL2 & BL31
Add support for the firmware handoff framework between BL2 and BL31. Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes in recent m
feat(arm): support FW handoff b/w BL2 & BL31
Add support for the firmware handoff framework between BL2 and BL31. Create a transfer list in trusted SRAM, leveraging the larger SRAM sizes in recent models. Load the HW_CONFIG as a TE along with entry point parameters for BL31 execution.
Change-Id: I7c4c6e8353ca978a13520fb3e15fb2803f0f1d0e Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| #
b2bca9eb |
| 01-Mar-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "smmuv3_fix" into integration
* changes: feat(smmu): separate out smmuv3_security_init from smmuv3_init feat(smmu): fix to perform INV_ALL before enabling GPC
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| #
a23710b4 |
| 21-Dec-2023 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
feat(smmu): separate out smmuv3_security_init from smmuv3_init
Split the smmuv3_init() to separate smmuv3_security_init() from it in order to allow skipping the default deny policy on reset for cert
feat(smmu): separate out smmuv3_security_init from smmuv3_init
Split the smmuv3_init() to separate smmuv3_security_init() from it in order to allow skipping the default deny policy on reset for certain SMMUv3 implementations. Additionally, fix a couple of MISRA warnings.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Vivek Gautam <vivek.gautam@arm.com> Change-Id: I2127943e709dd1ded34145bd022c930e351bbb4a
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| #
a4c69581 |
| 15-Mar-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3" into integration
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| #
42d4d3ba |
| 22-Nov-2022 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3
BL2_AT_EL3 is an overloaded macro which has two uses: 1. When BL2 is entry point into TF-A(no BL1) 2. When BL2 is runnin
refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3
BL2_AT_EL3 is an overloaded macro which has two uses: 1. When BL2 is entry point into TF-A(no BL1) 2. When BL2 is running at EL3 exception level These two scenarios are not exactly same even though first implicitly means second to be true. To distinguish between these two use cases we introduce new macros. BL2_AT_EL3 is renamed to RESET_TO_BL2 to better convey both 1. and 2. Additional macro BL2_RUNS_AT_EL3 is added to cover all scenarious where BL2 runs at EL3 (including four world systems).
BREAKING CHANGE: BL2_AT_EL3 renamed to RESET_TO_BL2 across the repository.
Change-Id: I477e1d0f843b44b799c216670e028fcb3509fb72 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
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| #
af4fee04 |
| 10-Feb-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "mb/tos-fw-config-load-refactor" into integration
* changes: feat(spmd): map SPMC manifest region as EL3_PAS feat(fvp): update device tree with load addresses of TOS_FW
Merge changes from topic "mb/tos-fw-config-load-refactor" into integration
* changes: feat(spmd): map SPMC manifest region as EL3_PAS feat(fvp): update device tree with load addresses of TOS_FW config refactor(fvp): rename the DTB info structure member feat(fconf): rename 'ns-load-address' to 'secondary-load-address'
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| #
f348aec1 |
| 07-Feb-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(fvp): rename the DTB info structure member
In line with the previous patch, the name of the member of the hw_config DTB info structure has been renamed.
Change-Id: I6689e416fecd66faa515e82
refactor(fvp): rename the DTB info structure member
In line with the previous patch, the name of the member of the hw_config DTB info structure has been renamed.
Change-Id: I6689e416fecd66faa515e820f1c4b23bcb65bfb1 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| #
1ced6cad |
| 03-May-2022 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "refactor-hw-config-load" into integration
* changes: docs(fvp): update loading addresses of HW_CONFIG docs(fconf): update device tree binding for FCONF feat(fvp): upd
Merge changes from topic "refactor-hw-config-load" into integration
* changes: docs(fvp): update loading addresses of HW_CONFIG docs(fconf): update device tree binding for FCONF feat(fvp): update HW_CONFIG DT loading mechanism refactor(st): update set_config_info function call refactor(fvp_r): update set_config_info function call refactor(arm): update set_config_info function call feat(fconf): add NS load address in configuration DTB nodes
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| #
39f0b86a |
| 15-Mar-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(fvp): update HW_CONFIG DT loading mechanism
Currently, HW-config is loaded into non-secure memory, which mean a malicious NS-agent could tamper with it. Ideally, this shouldn't be an issue sinc
feat(fvp): update HW_CONFIG DT loading mechanism
Currently, HW-config is loaded into non-secure memory, which mean a malicious NS-agent could tamper with it. Ideally, this shouldn't be an issue since no software runs in non-secure world at this time (non-secure world has not been started yet).
It does not provide a guarantee though since malicious external NS-agents can take control of this memory region for update/corruption after BL2 loads it and before BL31/BL32/SP_MIN consumes it. The threat is mapped to Threat ID#3 (Bypass authentication scenario) in threat model [1].
Hence modified the code as below - 1. BL2 loads the HW_CONFIG into secure memory 2. BL2 makes a copy of the HW_CONFIG in the non-secure memory at an address provided by the newly added property(ns-load-address) in the 'hw-config' node of the FW_CONFIG 3. SP_MIN receives the FW_CONFIG address from BL2 via arg1 so that it can retrieve details (address and size) of HW_CONFIG from FW_CONFIG 4. A secure and non-secure HW_CONFIG address will eventually be used by BL31/SP_MIN/BL32 and BL33 components respectively 5. BL31/SP_MIN dynamically maps the Secure HW_CONFIG region and reads information from it to local variables (structures) and then unmaps it 6. Reduce HW_CONFIG maximum size from 16MB to 1MB; it appears sufficient, and it will also create a free space for any future components to be added to memory
[1]: https://trustedfirmware-a.readthedocs.io/en/latest/threat_model/threat_model.html
Change-Id: I1d431f3e640ded60616604b1c33aa638b9a1e55e Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| #
61fa5523 |
| 10-Mar-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(fvp): FCONF Trace Not Shown" into integration
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| #
0c55c103 |
| 01-Feb-2022 |
Juan Pablo Conde <juanpablo.conde@arm.com> |
fix(fvp): FCONF Trace Not Shown
Updating call order for arm_console_boot_init() and arm_bl31_early_platform_setup().
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com> Change-Id: If932fff2
fix(fvp): FCONF Trace Not Shown
Updating call order for arm_console_boot_init() and arm_bl31_early_platform_setup().
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com> Change-Id: If932fff2ee4282a0aacf8751fa81e7665b886467
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| #
b8247e11 |
| 26-Jun-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "fw_config_handoff" into integration
* changes: doc: Update arg usage for BL2 and BL31 setup functions doc: Update BL1 and BL2 boot flow plat/arm: Use only fw_config b
Merge changes from topic "fw_config_handoff" into integration
* changes: doc: Update arg usage for BL2 and BL31 setup functions doc: Update BL1 and BL2 boot flow plat/arm: Use only fw_config between bl2 and bl31
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| #
7fb9bcd8 |
| 30-May-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
plat/arm: Use only fw_config between bl2 and bl31
Passed the address of fw_config instead of soc_fw_config as arg1 to BL31 from BL2 for ARM fvp platform.
BL31 then retrieve load-address of other de
plat/arm: Use only fw_config between bl2 and bl31
Passed the address of fw_config instead of soc_fw_config as arg1 to BL31 from BL2 for ARM fvp platform.
BL31 then retrieve load-address of other device trees from fw_config device tree.
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ib7e9581cd765d76111dcc3b7e0dafc12503c83c1
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| #
3df38b65 |
| 25-Jun-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/fvp: Dynamic description of clock freq" into integration
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| #
156dbdd4 |
| 10-Jun-2020 |
laurenw-arm <lauren.wehrmeister@arm.com> |
plat/fvp: Dynamic description of clock freq
Query clock frequency in runtime using FCONF getter API
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Ie6a8a62d8d190b9994feff
plat/fvp: Dynamic description of clock freq
Query clock frequency in runtime using FCONF getter API
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Ie6a8a62d8d190b9994feffb167a1d48829913e9b
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| #
d2737fe1 |
| 12-Mar-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge changes from topic "mp/enhanced_pal_hw" into integration
* changes: plat/arm/fvp: populate pwr domain descriptor dynamically fconf: Extract topology node properties from HW_CONFIG dtb fc
Merge changes from topic "mp/enhanced_pal_hw" into integration
* changes: plat/arm/fvp: populate pwr domain descriptor dynamically fconf: Extract topology node properties from HW_CONFIG dtb fconf: necessary modifications to support fconf in BL31 & SP_MIN fconf: enhancements to firmware configuration framework
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| #
26d1e0c3 |
| 27-Jan-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
fconf: necessary modifications to support fconf in BL31 & SP_MIN
Necessary infrastructure added to integrate fconf framework in BL31 & SP_MIN. Created few populator() functions which parse HW_CONFIG
fconf: necessary modifications to support fconf in BL31 & SP_MIN
Necessary infrastructure added to integrate fconf framework in BL31 & SP_MIN. Created few populator() functions which parse HW_CONFIG device tree and registered them with fconf framework. Many of the changes are only applicable for fvp platform.
This patch: 1. Adds necessary symbols and sections in BL31, SP_MIN linker script 2. Adds necessary memory map entry for translation in BL31, SP_MIN 3. Creates an abstraction layer for hardware configuration based on fconf framework 4. Adds necessary changes to build flow (makefiles) 5. Minimal callback to read hw_config dtb for capturing properties related to GIC(interrupt-controller node) 6. updates the fconf documentation
Change-Id: Ib6292071f674ef093962b9e8ba0d322b7bf919af Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| #
988cc820 |
| 16-Aug-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "FVP: Add Delay Timer driver to BL1 and BL31" into integration
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| #
1b597c22 |
| 16-Aug-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
FVP: Add Delay Timer driver to BL1 and BL31
SMMUv3 driver functions which are called from BL1 and BL31 currently use counter-based poll method for testing status bits. Adding Delay Timer driver to B
FVP: Add Delay Timer driver to BL1 and BL31
SMMUv3 driver functions which are called from BL1 and BL31 currently use counter-based poll method for testing status bits. Adding Delay Timer driver to BL1 and BL31 is required for timeout-based implementation using timer delay functions for SMMU and other drivers. This patch adds new function `fvp_timer_init()` which initialises either System level generic or SP804 timer based on FVP_USE_SP804_TIMER build flag. In BL2U `bl2u_early_platform_setup()` function the call to `arm_bl2u_early_platform_setup()` (which calls `generic_delay_timer_init()` ignoring FVP_USE_SP804_TIMER flag), is replaced with `arm_console_boot_init()` and `fvp_timer_init()`.
Change-Id: Ifd8dcebf4019e877b9bc5641551deef77a44c0d1 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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