1*92196d4fSMarek Vasut /* 2*92196d4fSMarek Vasut * Copyright (c) 2025, Renesas Electronics Corporation. All rights reserved. 3*92196d4fSMarek Vasut * 4*92196d4fSMarek Vasut * SPDX-License-Identifier: BSD-3-Clause 5*92196d4fSMarek Vasut */ 6*92196d4fSMarek Vasut 7*92196d4fSMarek Vasut #include <assert.h> 8*92196d4fSMarek Vasut 9*92196d4fSMarek Vasut #include <arch.h> 10*92196d4fSMarek Vasut #include <lib/mmio.h> 11*92196d4fSMarek Vasut #include <plat/common/platform.h> 12*92196d4fSMarek Vasut 13*92196d4fSMarek Vasut #include "rcar_def.h" 14*92196d4fSMarek Vasut #include "rcar_private.h" 15*92196d4fSMarek Vasut 16*92196d4fSMarek Vasut #define RCAR_CNTCVL_OFF (0x08U) 17*92196d4fSMarek Vasut #define RCAR_CNTCVU_OFF (0x0CU) 18*92196d4fSMarek Vasut 19*92196d4fSMarek Vasut static uint64_t rcar_pwrc_saved_cntpct_el0; 20*92196d4fSMarek Vasut static uint32_t rcar_pwrc_saved_cntfid; 21*92196d4fSMarek Vasut rcar_pwrc_save_timer_state(void)22*92196d4fSMarek Vasutvoid rcar_pwrc_save_timer_state(void) 23*92196d4fSMarek Vasut { 24*92196d4fSMarek Vasut rcar_pwrc_saved_cntpct_el0 = read_cntpct_el0(); 25*92196d4fSMarek Vasut 26*92196d4fSMarek Vasut rcar_pwrc_saved_cntfid = 27*92196d4fSMarek Vasut mmio_read_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF)); 28*92196d4fSMarek Vasut } 29*92196d4fSMarek Vasut rcar_pwrc_restore_timer_state(void)30*92196d4fSMarek Vasutvoid rcar_pwrc_restore_timer_state(void) 31*92196d4fSMarek Vasut { 32*92196d4fSMarek Vasut /* Stop timer before restoring counter value */ 33*92196d4fSMarek Vasut mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTCR_OFF), 0U); 34*92196d4fSMarek Vasut 35*92196d4fSMarek Vasut /* restore lower counter value */ 36*92196d4fSMarek Vasut mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVL_OFF), 37*92196d4fSMarek Vasut (uint32_t)(rcar_pwrc_saved_cntpct_el0 & 0xFFFFFFFFU)); 38*92196d4fSMarek Vasut /* restore upper counter value */ 39*92196d4fSMarek Vasut mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVU_OFF), 40*92196d4fSMarek Vasut (uint32_t)(rcar_pwrc_saved_cntpct_el0 >> 32U)); 41*92196d4fSMarek Vasut /* restore counter frequency setting */ 42*92196d4fSMarek Vasut mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTFID_OFF), 43*92196d4fSMarek Vasut rcar_pwrc_saved_cntfid); 44*92196d4fSMarek Vasut 45*92196d4fSMarek Vasut /* Start generic timer back */ 46*92196d4fSMarek Vasut write_cntfrq_el0((u_register_t)plat_get_syscnt_freq2()); 47*92196d4fSMarek Vasut 48*92196d4fSMarek Vasut mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + CNTCR_OFF), 49*92196d4fSMarek Vasut CNTCR_FCREQ((uint32_t)(0)) | CNTCR_EN); 50*92196d4fSMarek Vasut } 51